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e1000: reorder pci-e infor struct

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Order pci-e capability struct according to bus/pci bus width ordering
preserving the hard pci spec numbers.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Jeff Kirsher 2006-11-01 08:47:47 -08:00 committed by Jeff Garzik
parent 070f6ffbb8
commit 2bc35c1078
1 changed files with 5 additions and 3 deletions
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8
drivers/net/e1000/e1000_hw.h
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@ -128,11 +128,13 @@ typedef enum {
/* PCI bus widths */
typedef enum {
e1000_bus_width_unknown = 0,
/* These PCIe values should literally match the possible return values
* from config space */
e1000_bus_width_pciex_1 = 1,
e1000_bus_width_pciex_2 = 2,
e1000_bus_width_pciex_4 = 4,
e1000_bus_width_32,
e1000_bus_width_64,
e1000_bus_width_pciex_1,
e1000_bus_width_pciex_2,
e1000_bus_width_pciex_4,
e1000_bus_width_reserved
} e1000_bus_width;