From 36f0c149bd3e4ad7f65ad4101236b65cece5e489 Mon Sep 17 00:00:00 2001 From: Arun KS Date: Fri, 27 Mar 2015 20:17:35 +0530 Subject: [PATCH] clk: qcom: clock-local2: Add support for RCGs with dynamic pll Some RCGSs can have sources with dynamic frequencies. Add a member in clk_freq_tbl to represent source frequency which rcg_set_rate uses to set its parent frequency. Set src_freq to 0 for fixed frequency sources. Change-Id: I4fddf707924e73706eda45df203cbb3ac1502f0c Signed-off-by: Arun KS --- drivers/clk/qcom/clock-local2.c | 6 ++++++ include/soc/qcom/clock-local2.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/clk/qcom/clock-local2.c b/drivers/clk/qcom/clock-local2.c index d08c3f3ab697..b4a444807ca0 100644 --- a/drivers/clk/qcom/clock-local2.c +++ b/drivers/clk/qcom/clock-local2.c @@ -263,6 +263,12 @@ static int rcg_clk_set_rate(struct clk *c, unsigned long rate) cf = rcg->current_freq; + if (nf->src_freq != FIXED_CLK_SRC) { + rc = clk_set_rate(nf->src_clk, nf->src_freq); + if (rc) + return rc; + } + rc = __clk_pre_reparent(c, nf->src_clk, &flags); if (rc) return rc; diff --git a/include/soc/qcom/clock-local2.h b/include/soc/qcom/clock-local2.h index aa94cd2eb687..f671ca70ab13 100644 --- a/include/soc/qcom/clock-local2.h +++ b/include/soc/qcom/clock-local2.h @@ -24,6 +24,7 @@ /** * @freq_hz: output rate + * @src_freq: source freq for dynamic pll. For fixed plls, set to 0. * @src_clk: source clock for freq_hz * @m_val: M value corresponding to freq_hz * @n_val: N value corresponding to freq_hz @@ -33,6 +34,7 @@ */ struct clk_freq_tbl { unsigned long freq_hz; + unsigned long src_freq; struct clk *src_clk; u32 m_val; u32 n_val; @@ -43,6 +45,7 @@ struct clk_freq_tbl { #define FREQ_END (ULONG_MAX-1) #define F_END { .freq_hz = FREQ_END } +#define FIXED_CLK_SRC 0 /* * Generic clock-definition struct and macros