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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-09-20 19:34:46 +00:00
phy: relocate and rename phy ufs files
This change contains: 1. Relocating the phy ufs files to reside under the phy driver since this is the location of any file that implements the APIs presented in the generic phy framework 2. Renaming ufs-msm-phy*.* files to be phy-qcom-ufs*.* files. Since UFS is not used strictly in a specific set of targets but rather its code is applicable to MSM, APQ, IPQ etc, any mentioning of "msm" in the file name should be changed to "qcom". Also, prefix of "phy-" is the naming convention of platform driver files that reside in the phy driver. 3. As a result of the relocation of files into the phy driver, a new path is created (include/linux/scsi/ufs) and there we expose ufs header files that are being used also from the drivers/scsi/ufs and from drivers/phy as well. Change-Id: Ie5cb47718911ff711d9401a389f56fa508fcddf3 Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
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3ba23ab306
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@ -4,3 +4,6 @@
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obj-$(CONFIG_GENERIC_PHY) += phy-core.o
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obj-$(CONFIG_PHY_MSM_SATA) += phy-msm-sata.o
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obj-$(CONFIG_SCSI_UFS_QCOM) += phy-qcom-ufs.o
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obj-$(CONFIG_SCSI_UFS_QCOM) += phy-qcom-ufs-qmp-28nm.o
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obj-$(CONFIG_SCSI_UFS_QCOM) += phy-qcom-ufs-qmp-20nm.o
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@ -22,8 +22,8 @@
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#include <linux/platform_device.h>
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#include <linux/msm-bus.h>
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#include "ufs-msm-phy.h"
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#include "ufs-msm-phy-qmp-20nm.h"
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#include <linux/phy/phy-qcom-ufs.h>
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#include "phy-qcom-ufs-qmp-20nm.h"
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#define UFS_PHY_NAME "ufs_phy_qmp_20nm"
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@ -15,7 +15,7 @@
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#ifndef UFS_QCOM_PHY_QMP_20NM_H_
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#define UFS_QCOM_PHY_QMP_20NM_H_
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#include "ufs-msm-phy.h"
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#include <linux/phy/phy-qcom-ufs.h>
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/* QCOM UFS PHY control registers */
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@ -23,8 +23,8 @@
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#include <linux/msm-bus.h>
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#include <linux/phy/phy.h>
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#include "ufs-msm-phy.h"
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#include "ufs-msm-phy-qmp-28nm.h"
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#include <linux/phy/phy-qcom-ufs.h>
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#include "phy-qcom-ufs-qmp-28nm.h"
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#define UFS_PHY_NAME "ufs_qcom_phy_qmp_28nm"
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@ -15,7 +15,7 @@
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#ifndef UFS_QCOM_PHY_QMP_28NM_H_
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#define UFS_QCOM_PHY_QMP_28NM_H_
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#include "ufs-msm-phy.h"
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#include <linux/phy/phy-qcom-ufs.h>
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/* QCOM UFS PHY control registers */
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@ -22,7 +22,7 @@
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#include <linux/platform_device.h>
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#include <linux/msm-bus.h>
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#include "ufs-msm-phy.h"
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#include <linux/phy/phy-qcom-ufs.h>
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int ufs_qcom_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
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struct ufs_qcom_phy_calibration *tbl_A,
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@ -1,8 +1,5 @@
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# UFSHCD makefile
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obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-msm.o
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obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-msm-phy.o
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obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-msm-phy-qmp-28nm.o
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obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-msm-phy-qmp-20nm.o
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obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
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obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o ufs_quirks.o
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obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
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obj-$(CONFIG_SCSI_UFSHCD_PLATFORM) += ufshcd-pltfrm.o
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@ -19,7 +19,8 @@
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#include <linux/random.h>
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#include "debugfs.h"
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#include "unipro.h"
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#include <linux/scsi/ufs/unipro.h>
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#include "ufshci.h"
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enum field_width {
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BYTE = 1,
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@ -1,4 +1,4 @@
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
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/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -21,7 +21,7 @@
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#define _UFS_DEBUGFS_H
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#include <linux/debugfs.h>
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#include "ufshcd.h"
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#include <linux/scsi/ufs/ufshcd.h>
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#ifdef CONFIG_DEBUG_FS
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void ufsdbg_add_debugfs(struct ufs_hba *hba);
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@ -24,9 +24,10 @@
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#include <linux/msm-bus.h>
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#include <soc/qcom/scm.h>
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#include "ufshcd.h"
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#include "ufs-msm.h"
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#include "ufs-msm-phy.h"
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#include <linux/scsi/ufs/ufshcd.h>
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#include <linux/scsi/ufs/ufs-qcom.h>
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#include <linux/phy/phy-qcom-ufs.h>
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#include "ufshci.h"
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static int ufs_qcom_get_speed_mode(struct ufs_pa_layer_attr *p, char *result);
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static int ufs_qcom_get_bus_vote(struct ufs_qcom_host *host,
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@ -1,4 +1,5 @@
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/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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/*
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* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -10,7 +11,7 @@
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* GNU General Public License for more details.
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*/
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#include "ufshcd.h"
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#include <linux/scsi/ufs/ufshcd.h>
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#include "ufs_quirks.h"
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@ -23,8 +23,8 @@
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_host.h>
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#include "ufshcd.h"
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#include "ufs.h"
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#include <linux/scsi/ufs/ufshcd.h>
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#include <linux/scsi/ufs/ufs.h>
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#define MODULE_NAME "ufs_test"
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@ -33,7 +33,7 @@
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* this program.
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*/
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#include "ufshcd.h"
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#include <linux/scsi/ufs/ufshcd.h>
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#include <linux/pci.h>
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#include <linux/pm_runtime.h>
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@ -37,7 +37,7 @@
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include "ufshcd.h"
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#include <linux/scsi/ufs/ufshcd.h>
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static const struct of_device_id ufs_of_match[];
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static struct ufs_hba_variant_ops *get_variant_ops(struct device *dev)
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@ -42,8 +42,10 @@
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#include <linux/devfreq.h>
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#include <linux/nls.h>
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#include "ufshcd.h"
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#include "unipro.h"
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#include <linux/scsi/ufs/ufshcd.h>
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#include <linux/scsi/ufs/unipro.h>
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#include "ufshci.h"
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#include "ufs_quirks.h"
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#include "debugfs.h"
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#define CREATE_TRACE_POINTS
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@ -3063,6 +3065,23 @@ out:
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return err;
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}
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/**
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* ufshcd_hba_stop - Send controller to reset state
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* @hba: per adapter instance
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* @can_sleep: perform sleep or just spin
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*/
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static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
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{
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int err;
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ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
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err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
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CONTROLLER_ENABLE, CONTROLLER_DISABLE,
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10, 1, can_sleep);
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if (err)
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dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
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}
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/**
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* ufshcd_hba_enable - initialize the controller
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* @hba: per adapter instance
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@ -26,9 +26,9 @@
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#include <linux/phy/phy.h>
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#include <linux/msm-bus.h>
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#include "ufshcd.h"
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#include "unipro.h"
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#include "ufs-msm.h"
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#include <linux/scsi/ufs/ufshcd.h>
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#include <linux/scsi/ufs/unipro.h>
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#include <linux/scsi/ufs/ufs-qcom.h>
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#define UFS_QCOM_PHY_CAL_ENTRY(reg, val) \
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{ \
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#define UFS_QCOM_PHY_NAME_LEN 30
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enum {
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MASK_SERDES_START = 0x1,
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MASK_PCS_READY = 0x1,
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};
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enum {
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OFFSET_SERDES_START = 0x0,
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};
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struct ufs_qcom_phy_stored_attributes {
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u32 att;
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u32 value;
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@ -139,15 +139,6 @@ struct ufs_qcom_host {
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#define ufs_qcom_is_link_active(hba) ufshcd_is_link_active(hba)
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#define ufs_qcom_is_link_hibern8(hba) ufshcd_is_link_hibern8(hba)
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enum {
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MASK_SERDES_START = 0x1,
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MASK_PCS_READY = 0x1,
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};
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enum {
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OFFSET_SERDES_START = 0x0,
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};
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#define MAX_PROP_NAME 32
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#define VDDA_PHY_MIN_UV 1000000
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#define VDDA_PHY_MAX_UV 1000000
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@ -65,10 +65,7 @@
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#include <scsi/scsi_eh.h>
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#include <linux/fault-inject.h>
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#include "ufs.h"
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#include "ufshci.h"
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#include "ufs_quirks.h"
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#define UFSHCD "ufshcd"
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#define UFSHCD_DRIVER_VERSION "0.2"
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}
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#define ufshcd_writel(hba, val, reg) \
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writel((val), (hba)->mmio_base + (reg))
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writel_relaxed((val), (hba)->mmio_base + (reg))
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#define ufshcd_readl(hba, reg) \
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readl((hba)->mmio_base + (reg))
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readl_relaxed((hba)->mmio_base + (reg))
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/**
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* ufshcd_rmwl - read modify write into a register
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int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
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u32 val, unsigned long interval_us,
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unsigned long timeout_ms, bool can_sleep);
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/**
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* ufshcd_hba_stop - Send controller to reset state
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* @hba: per adapter instance
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* @can_sleep: perform sleep or just spin
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*/
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static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
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{
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int err;
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ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
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err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
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CONTROLLER_ENABLE, CONTROLLER_DISABLE,
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10, 1, can_sleep);
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if (err)
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dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
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}
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static inline void check_upiu_size(void)
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{
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BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
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GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
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}
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extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
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extern int ufshcd_runtime_resume(struct ufs_hba *hba);
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@ -1,6 +1,4 @@
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/*
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* drivers/scsi/ufs/unipro.h
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*
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* Copyright (C) 2013 Samsung Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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