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powerpc/85xx: Add power management support for MPC85xxMDS boards

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- Add power management controller nodes;
- Add interrupts for RTC nodes, the RTC interrupt may be used as a
  wakeup source;
- Add sleep properties (DEVDISR bit mask) and sleep-nexus nodes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Anton Vorontsov 2009-09-16 01:43:59 +04:00 committed by Kumar Gala
parent 4ffd6952a0
commit 3cfee0aaa1
3 changed files with 153 additions and 78 deletions
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51
arch/powerpc/boot/dts/mpc8568mds.dts
View file

@ -40,6 +40,8 @@
i-cache-line-size = <32>; // 32 bytes i-cache-line-size = <32>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K i-cache-size = <0x8000>; // L1, 32K
sleep = <&pmc 0x00008000 // core
&pmc 0x00004000>; // timebase
timebase-frequency = <0>; timebase-frequency = <0>;
bus-frequency = <0>; bus-frequency = <0>;
clock-frequency = <0>; clock-frequency = <0>;
@ -94,6 +96,13 @@
interrupts = <16 2>; interrupts = <16 2>;
}; };
i2c-sleep-nexus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
sleep = <&pmc 0x00000004>;
ranges;
i2c@3000 { i2c@3000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -107,6 +116,8 @@
rtc@68 { rtc@68 {
compatible = "dallas,ds1374"; compatible = "dallas,ds1374";
reg = <0x68>; reg = <0x68>;
interrupts = <3 1>;
interrupt-parent = <&mpic>;
}; };
}; };
@ -120,6 +131,7 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
dfsrr; dfsrr;
}; };
};
dma@21300 { dma@21300 {
#address-cells = <1>; #address-cells = <1>;
@ -128,6 +140,8 @@
reg = <0x21300 0x4>; reg = <0x21300 0x4>;
ranges = <0x0 0x21100 0x200>; ranges = <0x0 0x21100 0x200>;
cell-index = <0>; cell-index = <0>;
sleep = <&pmc 0x00000400>;
dma-channel@0 { dma-channel@0 {
compatible = "fsl,mpc8568-dma-channel", compatible = "fsl,mpc8568-dma-channel",
"fsl,eloplus-dma-channel"; "fsl,eloplus-dma-channel";
@ -176,6 +190,7 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
tbi-handle = <&tbi0>; tbi-handle = <&tbi0>;
phy-handle = <&phy2>; phy-handle = <&phy2>;
sleep = <&pmc 0x00000080>;
mdio@520 { mdio@520 {
#address-cells = <1>; #address-cells = <1>;
@ -228,6 +243,7 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
tbi-handle = <&tbi1>; tbi-handle = <&tbi1>;
phy-handle = <&phy3>; phy-handle = <&phy3>;
sleep = <&pmc 0x00000040>;
mdio@520 { mdio@520 {
#address-cells = <1>; #address-cells = <1>;
@ -242,6 +258,13 @@
}; };
}; };
duart-sleep-nexus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
sleep = <&pmc 0x00000002>;
ranges;
serial0: serial@4500 { serial0: serial@4500 {
cell-index = <0>; cell-index = <0>;
device_type = "serial"; device_type = "serial";
@ -252,12 +275,6 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
global-utilities@e0000 { //global utilities block
compatible = "fsl,mpc8548-guts";
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
serial1: serial@4600 { serial1: serial@4600 {
cell-index = <1>; cell-index = <1>;
device_type = "serial"; device_type = "serial";
@ -267,6 +284,22 @@
interrupts = <42 2>; interrupts = <42 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
};
global-utilities@e0000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
reg = <0xe0000 0x1000>;
ranges = <0 0xe0000 0x1000>;
fsl,has-rstcr;
pmc: power@70 {
compatible = "fsl,mpc8568-pmc",
"fsl,mpc8548-pmc";
reg = <0x70 0x20>;
};
};
crypto@30000 { crypto@30000 {
compatible = "fsl,sec2.1", "fsl,sec2.0"; compatible = "fsl,sec2.1", "fsl,sec2.0";
@ -277,6 +310,7 @@
fsl,channel-fifo-len = <24>; fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xfe>; fsl,exec-units-mask = <0xfe>;
fsl,descriptor-types-mask = <0x12b0ebf>; fsl,descriptor-types-mask = <0x12b0ebf>;
sleep = <&pmc 0x01000000>;
}; };
mpic: pic@40000 { mpic: pic@40000 {
@ -376,6 +410,7 @@
compatible = "fsl,qe"; compatible = "fsl,qe";
ranges = <0x0 0xe0080000 0x40000>; ranges = <0x0 0xe0080000 0x40000>;
reg = <0xe0080000 0x480>; reg = <0xe0080000 0x480>;
sleep = <&pmc 0x00000800>;
brg-frequency = <0>; brg-frequency = <0>;
bus-frequency = <396000000>; bus-frequency = <396000000>;
fsl,qe-num-riscs = <2>; fsl,qe-num-riscs = <2>;
@ -509,6 +544,7 @@
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>; 0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>;
sleep = <&pmc 0x80000000>;
clock-frequency = <66666666>; clock-frequency = <66666666>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <2>; #size-cells = <2>;
@ -534,6 +570,7 @@
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>; 0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>;
sleep = <&pmc 0x20000000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <2>; #size-cells = <2>;
@ -570,5 +607,7 @@
55 2 /* msg2_tx */ 55 2 /* msg2_tx */
56 2 /* msg2_rx */>; 56 2 /* msg2_rx */>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
sleep = <&pmc 0x00080000 /* controller */
&pmc 0x00040000>; /* message unit */
}; };
}; };

37
arch/powerpc/boot/dts/mpc8569mds.dts
View file

@ -41,6 +41,8 @@
i-cache-line-size = <32>; // 32 bytes i-cache-line-size = <32>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K i-cache-size = <0x8000>; // L1, 32K
sleep = <&pmc 0x00008000 // core
&pmc 0x00004000>; // timebase
timebase-frequency = <0>; timebase-frequency = <0>;
bus-frequency = <0>; bus-frequency = <0>;
clock-frequency = <0>; clock-frequency = <0>;
@ -59,6 +61,7 @@
reg = <0xe0005000 0x1000>; reg = <0xe0005000 0x1000>;
interrupts = <19 2>; interrupts = <19 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
sleep = <&pmc 0x08000000>;
ranges = <0x0 0x0 0xfe000000 0x02000000 ranges = <0x0 0x0 0xfe000000 0x02000000
0x1 0x0 0xf8000000 0x00008000 0x1 0x0 0xf8000000 0x00008000
@ -158,6 +161,13 @@
interrupts = <18 2>; interrupts = <18 2>;
}; };
i2c-sleep-nexus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
sleep = <&pmc 0x00000004>;
ranges;
i2c@3000 { i2c@3000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -171,6 +181,8 @@
rtc@68 { rtc@68 {
compatible = "dallas,ds1374"; compatible = "dallas,ds1374";
reg = <0x68>; reg = <0x68>;
interrupts = <3 1>;
interrupt-parent = <&mpic>;
}; };
}; };
@ -184,6 +196,14 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
dfsrr; dfsrr;
}; };
};
duart-sleep-nexus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
sleep = <&pmc 0x00000002>;
ranges;
serial0: serial@4500 { serial0: serial@4500 {
cell-index = <0>; cell-index = <0>;
@ -204,6 +224,7 @@
interrupts = <42 2>; interrupts = <42 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
};
L2: l2-cache-controller@20000 { L2: l2-cache-controller@20000 {
compatible = "fsl,mpc8569-l2-cache-controller"; compatible = "fsl,mpc8569-l2-cache-controller";
@ -260,6 +281,7 @@
reg = <0x2e000 0x1000>; reg = <0x2e000 0x1000>;
interrupts = <72 0x8>; interrupts = <72 0x8>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
sleep = <&pmc 0x00200000>;
/* Filled in by U-Boot */ /* Filled in by U-Boot */
clock-frequency = <0>; clock-frequency = <0>;
status = "disabled"; status = "disabled";
@ -276,6 +298,7 @@
fsl,channel-fifo-len = <24>; fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xbfe>; fsl,exec-units-mask = <0xbfe>;
fsl,descriptor-types-mask = <0x3ab0ebf>; fsl,descriptor-types-mask = <0x3ab0ebf>;
sleep = <&pmc 0x01000000>;
}; };
mpic: pic@40000 { mpic: pic@40000 {
@ -304,9 +327,18 @@
}; };
global-utilities@e0000 { global-utilities@e0000 {
compatible = "fsl,mpc8569-guts"; #address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
reg = <0xe0000 0x1000>; reg = <0xe0000 0x1000>;
ranges = <0 0xe0000 0x1000>;
fsl,has-rstcr; fsl,has-rstcr;
pmc: power@70 {
compatible = "fsl,mpc8569-pmc",
"fsl,mpc8548-pmc";
reg = <0x70 0x20>;
};
}; };
par_io@e0100 { par_io@e0100 {
@ -422,6 +454,7 @@
compatible = "fsl,qe"; compatible = "fsl,qe";
ranges = <0x0 0xe0080000 0x40000>; ranges = <0x0 0xe0080000 0x40000>;
reg = <0xe0080000 0x480>; reg = <0xe0080000 0x480>;
sleep = <&pmc 0x00000800>;
brg-frequency = <0>; brg-frequency = <0>;
bus-frequency = <0>; bus-frequency = <0>;
fsl,qe-num-riscs = <4>; fsl,qe-num-riscs = <4>;
@ -684,6 +717,7 @@
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>; 0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>;
sleep = <&pmc 0x20000000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
pcie@0 { pcie@0 {
reg = <0x0 0x0 0x0 0x0 0x0>; reg = <0x0 0x0 0x0 0x0 0x0>;
@ -714,5 +748,6 @@
55 2 /* msg2_tx */ 55 2 /* msg2_tx */
56 2 /* msg2_rx */>; 56 2 /* msg2_rx */>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
sleep = <&pmc 0x00080000>;
}; };
}; };

1
arch/powerpc/platforms/85xx/mpc85xx_mds.c
View file

@ -301,6 +301,7 @@ static struct of_device_id mpc85xx_ids[] = {
{ .compatible = "fsl,qe", }, { .compatible = "fsl,qe", },
{ .compatible = "gianfar", }, { .compatible = "gianfar", },
{ .compatible = "fsl,rapidio-delta", }, { .compatible = "fsl,rapidio-delta", },
{ .compatible = "fsl,mpc8548-guts", },
{}, {},
}; };