arm: Support the safe WFE sequence for Krait CPUs
Certain version of the Krait processor require a specific code sequence to be executed prior to executing a WFE instruction to permit that instruction to place the processor into a low-power state. Change-Id: I308adc691f110a323cbd84e9779675ac045826fa Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
This commit is contained in:
Stepan Moskovchenko
Stephen Boyd
parent
359cd77da2
commit
43ec03179a
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@ -7,6 +7,8 @@
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#include <asm/processor.h>
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extern int msm_krait_need_wfe_fixup;
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/*
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* sev and wfe are ARMv6K extensions. Uniprocessor ARMv6 may not have the K
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* extensions, so when running on UP, we have to patch these instructions away.
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@ -34,6 +36,31 @@
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#define WFE() ALT_SMP("wfe", "nop")
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#endif
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/*
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* The fixup involves disabling interrupts during execution of the WFE
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* instruction. This could potentially lead to deadlock if a thread is trying
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* to acquire a spinlock which is being released from an interrupt context.
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*/
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#ifdef CONFIG_MSM_KRAIT_WFE_FIXUP
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#define WFE_SAFE(fixup, tmp) \
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" mrs " tmp ", cpsr\n" \
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" cmp " fixup ", #0\n" \
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" wfeeq\n" \
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" beq 10f\n" \
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" cpsid if\n" \
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" mrc p15, 7, " fixup ", c15, c0, 5\n" \
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" bic " fixup ", " fixup ", #0x10000\n" \
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" mcr p15, 7, " fixup ", c15, c0, 5\n" \
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" isb\n" \
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" wfe\n" \
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" orr " fixup ", " fixup ", #0x10000\n" \
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" mcr p15, 7, " fixup ", c15, c0, 5\n" \
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" isb\n" \
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"10: msr cpsr_cf, " tmp "\n"
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#else
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#define WFE_SAFE(fixup, tmp) " wfe\n"
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#endif
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static inline void dsb_sev(void)
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{
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#if __LINUX_ARM_ARCH__ >= 7
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@ -65,7 +92,7 @@ static inline void dsb_sev(void)
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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unsigned long tmp;
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unsigned long tmp, flags = 0;
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u32 newval;
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arch_spinlock_t lockval;
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@ -80,7 +107,32 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
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: "cc");
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while (lockval.tickets.next != lockval.tickets.owner) {
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if (msm_krait_need_wfe_fixup) {
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local_irq_save(flags);
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__asm__ __volatile__(
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"mrc p15, 7, %0, c15, c0, 5\n"
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: "=r" (tmp)
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:
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: "cc");
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tmp &= ~(0x10000);
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__asm__ __volatile__(
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"mcr p15, 7, %0, c15, c0, 5\n"
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:
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: "r" (tmp)
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: "cc");
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isb();
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}
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wfe();
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if (msm_krait_need_wfe_fixup) {
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tmp |= 0x10000;
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__asm__ __volatile__(
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"mcr p15, 7, %0, c15, c0, 5\n"
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:
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: "r" (tmp)
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: "cc");
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isb();
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local_irq_restore(flags);
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}
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lockval.tickets.owner = ACCESS_ONCE(lock->tickets.owner);
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}
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@ -139,18 +191,18 @@ static inline int arch_spin_is_contended(arch_spinlock_t *lock)
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static inline void arch_write_lock(arch_rwlock_t *rw)
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{
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unsigned long tmp;
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unsigned long tmp, fixup = msm_krait_need_wfe_fixup;
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__asm__ __volatile__(
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"1: ldrex %0, [%1]\n"
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"1: ldrex %0, [%2]\n"
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" teq %0, #0\n"
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" beq 2f\n"
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WFE()
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WFE_SAFE("%1", "%0")
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"2:\n"
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" strexeq %0, %2, [%1]\n"
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" strexeq %0, %3, [%2]\n"
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" teq %0, #0\n"
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" bne 1b"
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: "=&r" (tmp)
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: "=&r" (tmp), "+r" (fixup)
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: "r" (&rw->lock), "r" (0x80000000)
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: "cc");
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@ -207,18 +259,18 @@ static inline void arch_write_unlock(arch_rwlock_t *rw)
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*/
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static inline void arch_read_lock(arch_rwlock_t *rw)
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{
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unsigned long tmp, tmp2;
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unsigned long tmp, tmp2, fixup = msm_krait_need_wfe_fixup;
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__asm__ __volatile__(
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"1: ldrex %0, [%2]\n"
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"1: ldrex %0, [%3]\n"
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" adds %0, %0, #1\n"
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" strexpl %1, %0, [%2]\n"
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" strexpl %1, %0, [%3]\n"
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" bpl 2f\n"
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WFE()
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WFE_SAFE("%2", "%0")
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"2:\n"
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" rsbpls %0, %1, #0\n"
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" bmi 1b"
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: "=&r" (tmp), "=&r" (tmp2)
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: "=&r" (tmp), "=&r" (tmp2), "+r" (fixup)
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: "r" (&rw->lock)
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: "cc");
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@ -173,6 +173,7 @@ config ARCH_MSM8960
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select HOLES_IN_ZONE if SPARSEMEM
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select MSM_RUN_QUEUE_STATS
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select ARM_HAS_SG_CHAIN
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select MSM_KRAIT_WFE_FIXUP
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config ARCH_MSM8930
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bool "MSM8930"
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@ -204,6 +205,7 @@ config ARCH_MSM8930
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select MSM_PM8X60 if PM
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select HOLES_IN_ZONE if SPARSEMEM
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select ARM_HAS_SG_CHAIN
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select MSM_KRAIT_WFE_FIXUP
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config ARCH_APQ8064
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bool "APQ8064"
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@ -230,6 +232,7 @@ config ARCH_APQ8064
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select MIGHT_HAVE_PCI
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select ARCH_SUPPORTS_MSI
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select ARM_HAS_SG_CHAIN
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select MSM_KRAIT_WFE_FIXUP
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config ARCH_MSM8974
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bool "MSM8974"
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@ -374,6 +377,9 @@ config ARCH_MSM_CORTEXMP
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select MSM_SMP
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bool
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config MSM_KRAIT_WFE_FIXUP
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bool
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config ARCH_MSM_CORTEX_A5
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bool
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select HAVE_HW_BRKPT_RESERVED_RW_ACCESS
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@ -32,6 +32,7 @@
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#include <asm/setup.h>
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#include <asm/tlb.h>
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#include <asm/fixmap.h>
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#include <asm/cputype.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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@ -40,6 +41,8 @@
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static unsigned long phys_initrd_start __initdata = 0;
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static unsigned long phys_initrd_size __initdata = 0;
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int msm_krait_need_wfe_fixup;
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EXPORT_SYMBOL(msm_krait_need_wfe_fixup);
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static int __init early_initrd(char *p)
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{
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@ -910,3 +913,17 @@ static int __init keepinitrd_setup(char *__unused)
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__setup("keepinitrd", keepinitrd_setup);
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#endif
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#ifdef CONFIG_MSM_KRAIT_WFE_FIXUP
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static int __init msm_krait_wfe_init(void)
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{
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unsigned int val, midr;
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midr = read_cpuid_id() & 0xffffff00;
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if ((midr == 0x511f0400) || (midr == 0x510f0600)) {
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asm volatile("mrc p15, 7, %0, c15, c0, 5" : "=r" (val));
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msm_krait_need_wfe_fixup = (val & 0x10000) ? 1 : 0;
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}
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return 0;
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}
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pure_initcall(msm_krait_wfe_init);
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#endif
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