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ARM: net: bpf_jit: fix emit_swap16() for non ARMv6+.
The original code was generating an lsl instructions using the value of ARM_R8 (skb_headlen, possibly uninitialized if no skb_headlen access was required) as a shift amount. Signed-off-by: Nicolas Schichan <nschichan@freebox.fr> Acked-by: Mircea Gherzan <mgherzan@gmail.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 11 additions and 4 deletions
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@ -341,10 +341,17 @@ static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
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static inline void emit_swap16(u8 r_dst, u8 r_src, struct jit_ctx *ctx)
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{
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emit(ARM_LSL_R(ARM_R1, r_src, 8), ctx);
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emit(ARM_ORR_S(r_dst, ARM_R1, r_src, SRTYPE_LSL, 8), ctx);
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emit(ARM_LSL_I(r_dst, r_dst, 8), ctx);
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emit(ARM_LSL_R(r_dst, r_dst, 8), ctx);
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/* r_dst = (r_src << 8) | (r_src >> 8) */
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emit(ARM_LSL_I(ARM_R1, r_src, 8), ctx);
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emit(ARM_ORR_S(r_dst, ARM_R1, r_src, SRTYPE_LSR, 8), ctx);
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/*
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* we need to mask out the bits set in r_dst[23:16] due to
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* the first shift instruction.
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*
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* note that 0x8ff is the encoded immediate 0x00ff0000.
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*/
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emit(ARM_BIC_I(r_dst, r_dst, 0x8ff), ctx);
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}
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#else /* ARMv6+ */
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