Merge "regmap: This is the implementation of regmap_multi_reg_write()"
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@ -135,7 +135,8 @@ struct regmap {
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/* if set, converts bulk rw to single rw */
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bool use_single_rw;
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/* if set, the device supports multi write mode */
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bool can_multi_write;
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struct rb_root range_tree;
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void *selector_work_buf; /* Scratch buffer used for selector */
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};
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@ -440,6 +440,7 @@ struct regmap *regmap_init(struct device *dev,
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else
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map->reg_stride = 1;
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map->use_single_rw = config->use_single_rw;
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map->can_multi_write = config->can_multi_write;
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map->dev = dev;
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map->bus = bus;
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map->bus_context = bus_context;
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@ -1319,6 +1320,258 @@ out:
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}
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EXPORT_SYMBOL_GPL(regmap_bulk_write);
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/*
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* _regmap_raw_multi_reg_write()
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*
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* the (register,newvalue) pairs in regs have not been formatted, but
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* they are all in the same page and have been changed to being page
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* relative. The page register has been written if that was necessary.
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*/
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static int _regmap_raw_multi_reg_write(struct regmap *map,
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const struct reg_default *regs,
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size_t num_regs)
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{
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int ret;
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void *buf;
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int i;
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u8 *u8;
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size_t val_bytes = map->format.val_bytes;
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size_t reg_bytes = map->format.reg_bytes;
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size_t pad_bytes = map->format.pad_bytes;
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size_t pair_size = reg_bytes + pad_bytes + val_bytes;
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size_t len = pair_size * num_regs;
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buf = kzalloc(len, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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/* We have to linearise by hand. */
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u8 = buf;
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for (i = 0; i < num_regs; i++) {
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int reg = regs[i].reg;
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int val = regs[i].def;
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trace_regmap_hw_write_start(map->dev, reg, 1);
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map->format.format_reg(u8, reg, map->reg_shift);
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u8 += reg_bytes + pad_bytes;
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map->format.format_val(u8, val, 0);
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u8 += val_bytes;
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}
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u8 = buf;
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*u8 |= map->write_flag_mask;
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ret = map->bus->write(map->bus_context, buf, len);
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kfree(buf);
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for (i = 0; i < num_regs; i++) {
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int reg = regs[i].reg;
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trace_regmap_hw_write_done(map->dev, reg, 1);
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}
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return ret;
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}
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static unsigned int _regmap_register_page(struct regmap *map,
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unsigned int reg,
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struct regmap_range_node *range)
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{
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unsigned int win_page = (reg - range->range_min) / range->window_len;
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return win_page;
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}
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static int _regmap_range_multi_paged_reg_write(struct regmap *map,
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struct reg_default *regs,
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size_t num_regs)
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{
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int ret;
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int i, n;
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struct reg_default *base;
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unsigned int this_page;
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/*
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* the set of registers are not neccessarily in order, but
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* since the order of write must be preserved this algorithm
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* chops the set each time the page changes
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*/
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base = regs;
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for (i = 0, n = 0; i < num_regs; i++, n++) {
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unsigned int reg = regs[i].reg;
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struct regmap_range_node *range;
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range = _regmap_range_lookup(map, reg);
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if (range) {
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unsigned int win_page = _regmap_register_page(map, reg,
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range);
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if (i == 0)
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this_page = win_page;
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if (win_page != this_page) {
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this_page = win_page;
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ret = _regmap_raw_multi_reg_write(map, base, n);
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if (ret != 0)
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return ret;
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base += n;
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n = 0;
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}
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ret = _regmap_select_page(map, &base[n].reg, range, 1);
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if (ret != 0)
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return ret;
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}
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}
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if (n > 0)
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return _regmap_raw_multi_reg_write(map, base, n);
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return 0;
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}
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static int _regmap_multi_reg_write(struct regmap *map,
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const struct reg_default *regs,
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size_t num_regs)
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{
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int i;
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int ret;
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if (!map->can_multi_write) {
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for (i = 0; i < num_regs; i++) {
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ret = _regmap_write(map, regs[i].reg, regs[i].def);
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if (ret != 0)
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return ret;
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}
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return 0;
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}
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if (!map->format.parse_inplace)
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return -EINVAL;
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if (map->writeable_reg)
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for (i = 0; i < num_regs; i++) {
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int reg = regs[i].reg;
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if (!map->writeable_reg(map->dev, reg))
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return -EINVAL;
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if (reg % map->reg_stride)
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return -EINVAL;
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}
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if (!map->cache_bypass) {
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for (i = 0; i < num_regs; i++) {
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unsigned int val = regs[i].def;
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unsigned int reg = regs[i].reg;
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ret = regcache_write(map, reg, val);
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if (ret) {
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dev_err(map->dev,
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"Error in caching of register: %x ret: %d\n",
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reg, ret);
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return ret;
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}
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}
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if (map->cache_only) {
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map->cache_dirty = true;
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return 0;
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}
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}
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WARN_ON(!map->bus);
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for (i = 0; i < num_regs; i++) {
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unsigned int reg = regs[i].reg;
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struct regmap_range_node *range;
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range = _regmap_range_lookup(map, reg);
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if (range) {
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size_t len = sizeof(struct reg_default)*num_regs;
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struct reg_default *base = kmemdup(regs, len,
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GFP_KERNEL);
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if (!base)
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return -ENOMEM;
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ret = _regmap_range_multi_paged_reg_write(map, base,
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num_regs);
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kfree(base);
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return ret;
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}
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}
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return _regmap_raw_multi_reg_write(map, regs, num_regs);
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}
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/*
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* regmap_multi_reg_write(): Write multiple registers to the device
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*
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* where the set of register,value pairs are supplied in any order,
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* possibly not all in a single range.
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*
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* @map: Register map to write to
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* @regs: Array of structures containing register,value to be written
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* @num_regs: Number of registers to write
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*
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* The 'normal' block write mode will send ultimately send data on the
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* target bus as R,V1,V2,V3,..,Vn where successively higer registers are
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* addressed. However, this alternative block multi write mode will send
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* the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
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* must of course support the mode.
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*
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* A value of zero will be returned on success, a negative errno will be
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* returned in error cases.
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*/
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int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
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int num_regs)
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{
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int ret;
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map->lock(map->lock_arg);
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ret = _regmap_multi_reg_write(map, regs, num_regs);
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map->unlock(map->lock_arg);
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return ret;
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}
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EXPORT_SYMBOL(regmap_multi_reg_write);
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/*
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* regmap_multi_reg_write_bypassed(): Write multiple registers to the
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* device but not the cache
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*
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* where the set of register are supplied in any order
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*
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* @map: Register map to write to
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* @regs: Array of structures containing register,value to be written
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* @num_regs: Number of registers to write
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*
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* This function is intended to be used for writing a large block of data
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* atomically to the device in single transfer for those I2C client devices
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* that implement this alternative block write mode.
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*
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* A value of zero will be returned on success, a negative errno will
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* be returned in error cases.
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*/
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int regmap_multi_reg_write_bypassed(struct regmap *map,
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const struct reg_default *regs,
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int num_regs)
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{
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int ret;
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bool bypass;
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map->lock(map->lock_arg);
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bypass = map->cache_bypass;
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map->cache_bypass = true;
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ret = _regmap_multi_reg_write(map, regs, num_regs);
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map->cache_bypass = bypass;
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map->unlock(map->lock_arg);
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return ret;
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}
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EXPORT_SYMBOL(regmap_multi_reg_write_bypassed);
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/**
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* regmap_raw_write_async(): Write raw values to one or more registers
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* asynchronously
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@ -162,7 +162,9 @@ typedef void (*regmap_unlock)(void *);
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* @use_single_rw: If set, converts the bulk read and write operations into
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* a series of single read and write operations. This is useful
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* for device that does not support bulk read and write.
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*
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* @can_multi_write: If set, the device supports the multi write mode of bulk
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* write operations, if clear multi write requests will be
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* split into individual write operations
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* @cache_type: The actual cache type.
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* @reg_defaults_raw: Power on reset values for registers (for use with
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* register cache support).
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@ -213,7 +215,7 @@ struct regmap_config {
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u8 write_flag_mask;
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bool use_single_rw;
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bool can_multi_write;
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enum regmap_endian reg_format_endian;
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enum regmap_endian val_format_endian;
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@ -383,6 +385,11 @@ int regmap_raw_write(struct regmap *map, unsigned int reg,
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const void *val, size_t val_len);
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int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
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size_t val_count);
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int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
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int num_regs);
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int regmap_multi_reg_write_bypassed(struct regmap *map,
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const struct reg_default *regs,
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int num_regs);
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int regmap_raw_write_async(struct regmap *map, unsigned int reg,
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const void *val, size_t val_len);
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int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
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