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clk: qcom: gcc: Update the fmax corner for SDCC clock for 8952/76

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The SVS corner for SDCC1 clock has been updated from 50MHz to 100MHz, so
update the same.

Change-Id: I921424c03115c151471b94d61ea1ea85a30a063c
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
Taniya Das 2015-09-01 09:38:26 +05:30 committed by Gerrit - the friendly Code Review server
parent c842f20d67
commit 531a478da6
2 changed files with 2 additions and 2 deletions
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2
drivers/clk/qcom/clock-gcc-8952.c
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@ -1432,7 +1432,7 @@ static struct rcg_clk sdcc1_apps_clk_src = {
.c = {
.dbg_name = "sdcc1_apps_clk_src",
.ops = &clk_ops_rcg_mnd,
VDD_DIG_FMAX_MAP2(LOWER, 50000000, NOMINAL, 384000000),
VDD_DIG_FMAX_MAP2(LOWER, 100000000, NOMINAL, 384000000),
CLK_INIT(sdcc1_apps_clk_src.c),
},
};

2
drivers/clk/qcom/clock-gcc-8976.c
View file

@ -1324,7 +1324,7 @@ static struct rcg_clk sdcc1_apps_clk_src = {
.c = {
.dbg_name = "sdcc1_apps_clk_src",
.ops = &clk_ops_rcg_mnd,
VDD_DIG_FMAX_MAP2(LOWER, 50000000, NOMINAL, 400000000),
VDD_DIG_FMAX_MAP2(LOWER, 100000000, NOMINAL, 400000000),
CLK_INIT(sdcc1_apps_clk_src.c),
},
};