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i2c: OMAP: Add DT support for i2c controller
Add initial DT support to retrieve the frequency using a DT attribute instead of the pdata pointer if of_node exist. Add documentation for omap i2c controller binding. Based on original patches from Manju and Grant. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Ben Dooks <ben-linux@fluff.org> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kevin Hilman <khilman@ti.com>
This commit is contained in:
Benoit Cousson
Ben Dooks
parent
78e1cf42ee
commit
6145197be6
2 changed files with 97 additions and 35 deletions
30
Documentation/devicetree/bindings/i2c/omap-i2c.txt
Normal file
30
Documentation/devicetree/bindings/i2c/omap-i2c.txt
Normal file
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@ -0,0 +1,30 @@
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I2C for OMAP platforms
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Required properties :
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- compatible : Must be "ti,omap3-i2c" or "ti,omap4-i2c"
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- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
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- #address-cells = <1>;
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- #size-cells = <0>;
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Recommended properties :
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- clock-frequency : Desired I2C bus clock frequency in Hz. Otherwise
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the default 100 kHz frequency will be used.
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Optional properties:
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- Child nodes conforming to i2c bus binding
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Note: Current implementation will fetch base address, irq and dma
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from omap hwmod data base during device registration.
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Future plan is to migrate hwmod data base contents into device tree
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blob so that, all the required data will be used from device tree dts
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file.
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Examples :
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i2c1: i2c@0 {
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compatible = "ti,omap3-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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clock-frequency = <400000>;
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};
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@ -37,6 +37,9 @@
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_i2c.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <linux/i2c-omap.h>
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#include <linux/pm_runtime.h>
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@ -182,7 +185,9 @@ struct omap_i2c_dev {
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u32 latency; /* maximum mpu wkup latency */
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void (*set_mpu_wkup_lat)(struct device *dev,
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long latency);
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u32 speed; /* Speed of bus in Khz */
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u32 speed; /* Speed of bus in kHz */
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u32 dtrev; /* extra revision from DT */
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u32 flags;
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u16 cmd_err;
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u8 *buf;
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u8 *regs;
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@ -266,11 +271,7 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
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static void omap_i2c_unidle(struct omap_i2c_dev *dev)
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{
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struct omap_i2c_bus_platform_data *pdata;
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pdata = dev->dev->platform_data;
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if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) {
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if (dev->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) {
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omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
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omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
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omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate);
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@ -291,13 +292,10 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
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static void omap_i2c_idle(struct omap_i2c_dev *dev)
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{
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struct omap_i2c_bus_platform_data *pdata;
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u16 iv;
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pdata = dev->dev->platform_data;
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dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
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if (pdata->rev == OMAP_I2C_IP_VERSION_2)
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if (dev->dtrev == OMAP_I2C_IP_VERSION_2)
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omap_i2c_write_reg(dev, OMAP_I2C_IP_V2_IRQENABLE_CLR, 1);
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else
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omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
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@ -320,9 +318,6 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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unsigned long timeout;
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unsigned long internal_clk = 0;
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struct clk *fclk;
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struct omap_i2c_bus_platform_data *pdata;
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pdata = dev->dev->platform_data;
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if (dev->rev >= OMAP_I2C_OMAP1_REV_2) {
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/* Disable I2C controller before soft reset */
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@ -373,7 +368,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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}
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omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
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if (pdata->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) {
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if (dev->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) {
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/*
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* The I2C functional clock is the armxor_ck, so there's
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* no need to get "armxor_ck" separately. Now, if OMAP2420
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@ -397,7 +392,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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psc = fclk_rate / 12000000;
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}
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if (!(pdata->flags & OMAP_I2C_FLAG_SIMPLE_CLOCK)) {
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if (!(dev->flags & OMAP_I2C_FLAG_SIMPLE_CLOCK)) {
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/*
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* HSI2C controller internal clk rate should be 19.2 Mhz for
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@ -406,7 +401,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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* The filter is iclk (fclk for HS) period.
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*/
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if (dev->speed > 400 ||
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pdata->flags & OMAP_I2C_FLAG_FORCE_19200_INT_CLK)
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dev->flags & OMAP_I2C_FLAG_FORCE_19200_INT_CLK)
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internal_clk = 19200;
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else if (dev->speed > 100)
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internal_clk = 9600;
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@ -475,7 +470,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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dev->errata = 0;
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if (pdata->flags & OMAP_I2C_FLAG_APPLY_ERRATA_I207)
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if (dev->flags & OMAP_I2C_FLAG_APPLY_ERRATA_I207)
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dev->errata |= I2C_OMAP_ERRATA_I207;
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/* Enable interrupts */
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@ -484,7 +479,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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OMAP_I2C_IE_AL) | ((dev->fifo_size) ?
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(OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0);
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omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
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if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) {
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if (dev->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) {
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dev->pscstate = psc;
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dev->scllstate = scll;
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dev->sclhstate = sclh;
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@ -804,9 +799,6 @@ omap_i2c_isr(int this_irq, void *dev_id)
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u16 bits;
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u16 stat, w;
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int err, count = 0;
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struct omap_i2c_bus_platform_data *pdata;
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pdata = dev->dev->platform_data;
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if (pm_runtime_suspended(dev->dev))
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return IRQ_NONE;
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@ -873,7 +865,7 @@ complete:
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* Data reg in 2430, omap3 and
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* omap4 is 8 bit wide
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*/
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if (pdata->flags &
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if (dev->flags &
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OMAP_I2C_FLAG_16BIT_DATA_REG) {
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if (dev->buf_len) {
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*dev->buf++ = w >> 8;
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@ -916,7 +908,7 @@ complete:
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* Data reg in 2430, omap3 and
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* omap4 is 8 bit wide
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*/
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if (pdata->flags &
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if (dev->flags &
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OMAP_I2C_FLAG_16BIT_DATA_REG) {
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if (dev->buf_len) {
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w |= *dev->buf++ << 8;
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@ -963,6 +955,32 @@ static const struct i2c_algorithm omap_i2c_algo = {
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.functionality = omap_i2c_func,
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};
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#ifdef CONFIG_OF
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static struct omap_i2c_bus_platform_data omap3_pdata = {
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.rev = OMAP_I2C_IP_VERSION_1,
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.flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |
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OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
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OMAP_I2C_FLAG_BUS_SHIFT_2,
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};
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static struct omap_i2c_bus_platform_data omap4_pdata = {
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.rev = OMAP_I2C_IP_VERSION_2,
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};
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static const struct of_device_id omap_i2c_of_match[] = {
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{
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.compatible = "ti,omap4-i2c",
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.data = &omap4_pdata,
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},
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{
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.compatible = "ti,omap3-i2c",
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.data = &omap3_pdata,
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},
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{ },
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};
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MODULE_DEVICE_TABLE(of, omap_i2c_of_match);
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#endif
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static int __devinit
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omap_i2c_probe(struct platform_device *pdev)
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{
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@ -970,9 +988,10 @@ omap_i2c_probe(struct platform_device *pdev)
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struct i2c_adapter *adap;
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struct resource *mem, *irq, *ioarea;
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struct omap_i2c_bus_platform_data *pdata = pdev->dev.platform_data;
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struct device_node *node = pdev->dev.of_node;
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const struct of_device_id *match;
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irq_handler_t isr;
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int r;
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u32 speed = 0;
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/* NOTE: driver uses the static register mapping */
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -999,15 +1018,24 @@ omap_i2c_probe(struct platform_device *pdev)
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goto err_release_region;
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}
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if (pdata != NULL) {
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speed = pdata->clkrate;
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match = of_match_device(omap_i2c_of_match, &pdev->dev);
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if (match) {
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u32 freq = 100000; /* default to 100000 Hz */
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pdata = match->data;
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dev->dtrev = pdata->rev;
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dev->flags = pdata->flags;
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of_property_read_u32(node, "clock-frequency", &freq);
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/* convert DT freq value in Hz into kHz for speed */
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dev->speed = freq / 1000;
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} else if (pdata != NULL) {
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dev->speed = pdata->clkrate;
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dev->flags = pdata->flags;
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dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat;
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} else {
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speed = 100; /* Default speed */
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dev->set_mpu_wkup_lat = NULL;
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dev->dtrev = pdata->rev;
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}
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dev->speed = speed;
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dev->dev = &pdev->dev;
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dev->irq = irq->start;
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dev->base = ioremap(mem->start, resource_size(mem));
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@ -1018,9 +1046,9 @@ omap_i2c_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, dev);
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dev->reg_shift = (pdata->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3;
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dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3;
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if (pdata->rev == OMAP_I2C_IP_VERSION_2)
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if (dev->dtrev == OMAP_I2C_IP_VERSION_2)
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dev->regs = (u8 *)reg_map_ip_v2;
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else
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dev->regs = (u8 *)reg_map_ip_v1;
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@ -1033,7 +1061,7 @@ omap_i2c_probe(struct platform_device *pdev)
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if (dev->rev <= OMAP_I2C_REV_ON_3430)
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dev->errata |= I2C_OMAP3_1P153;
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if (!(pdata->flags & OMAP_I2C_FLAG_NO_FIFO)) {
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if (!(dev->flags & OMAP_I2C_FLAG_NO_FIFO)) {
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u16 s;
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/* Set up the fifo size - Get total size */
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@ -1056,7 +1084,7 @@ omap_i2c_probe(struct platform_device *pdev)
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/* calculate wakeup latency constraint for MPU */
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if (dev->set_mpu_wkup_lat != NULL)
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dev->latency = (1000000 * dev->fifo_size) /
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(1000 * speed / 8);
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(1000 * dev->speed / 8);
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}
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/* reset ASAP, clearing any IRQs */
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@ -1072,7 +1100,7 @@ omap_i2c_probe(struct platform_device *pdev)
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}
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dev_info(dev->dev, "bus %d rev%d.%d.%d at %d kHz\n", pdev->id,
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pdata->rev, dev->rev >> 4, dev->rev & 0xf, dev->speed);
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dev->dtrev, dev->rev >> 4, dev->rev & 0xf, dev->speed);
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pm_runtime_put(dev->dev);
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@ -1083,6 +1111,7 @@ omap_i2c_probe(struct platform_device *pdev)
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strlcpy(adap->name, "OMAP I2C adapter", sizeof(adap->name));
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adap->algo = &omap_i2c_algo;
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adap->dev.parent = &pdev->dev;
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adap->dev.of_node = pdev->dev.of_node;
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/* i2c device drivers may be active on return from add_adapter() */
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adap->nr = pdev->id;
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@ -1092,6 +1121,8 @@ omap_i2c_probe(struct platform_device *pdev)
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goto err_free_irq;
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}
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of_i2c_register_devices(adap);
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return 0;
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err_free_irq:
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@ -1164,6 +1195,7 @@ static struct platform_driver omap_i2c_driver = {
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.name = "omap_i2c",
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.owner = THIS_MODULE,
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.pm = OMAP_I2C_PM_OPS,
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.of_match_table = of_match_ptr(omap_i2c_of_match),
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},
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};
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