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arm64: Implement branch predictor hardening for cortex A57, A72. 

Implement a PSCI-based mitigation cortex A57 and cortex A72,
to invalidate branch predictor state.

Change-Id: Ia297725142470e9bd1fcbb2693529f62790a747e
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Signed-off-by: Rajshekar Eashwarappa <reashw@codeaurora.org>
This commit is contained in:
Neeraj Upadhyay 2018-01-20 12:40:48 +05:30 committed by syphyr
parent ca66d14e62
commit 687215def0
3 changed files with 32 additions and 0 deletions
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5
arch/arm64/include/asm/cpufeature.h
View File

@ -28,4 +28,9 @@ static inline bool cpu_have_feature(unsigned int num)
void __init setup_cpu_features(void);
#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
extern bool sys_psci_bp_hardening_initialised;
extern void enable_psci_bp_hardening(void *data);
#endif
#endif

22
arch/arm64/kernel/setup.c
View File

@ -49,6 +49,7 @@
#include <asm/fixmap.h>
#include <asm/cputype.h>
#include <asm/elf.h>
#include <asm/cpufeature.h>
#include <asm/cputable.h>
#include <asm/cpu_ops.h>
#include <asm/sections.h>
@ -108,6 +109,9 @@ unsigned int compat_elf_hwcap2 __read_mostly;
static const char *cpu_name;
const char *machine_name;
#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
bool sys_psci_bp_hardening_initialised;
#endif
phys_addr_t __fdt_pointer __initdata;
/*
@ -241,6 +245,19 @@ static void __maybe_unused install_bp_hardening_cb(bp_hardening_cb_t fn)
{
__install_bp_hardening_cb(fn);
}
#include <linux/psci.h>
void enable_psci_bp_hardening(void *data) {
if (psci_ops.get_version) {
switch(read_cpuid_part_number()) {
case ARM_CPU_PART_CORTEX_A57:
case ARM_CPU_PART_CORTEX_A72:
install_bp_hardening_cb(
(bp_hardening_cb_t)psci_ops.get_version);
}
}
}
#endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */
void __init setup_cpu_features(void)
@ -249,6 +266,11 @@ void __init setup_cpu_features(void)
u32 cwg;
int cls;
#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
on_each_cpu(enable_psci_bp_hardening, NULL, true);
sys_psci_bp_hardening_initialised = true;
#endif
/*
* Check for sane CTR_EL0.CWG value.
*/

5
arch/arm64/kernel/smp.c
View File

@ -163,6 +163,11 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
if (cpu_ops[cpu]->cpu_postboot)
cpu_ops[cpu]->cpu_postboot();
#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
if (sys_psci_bp_hardening_initialised)
enable_psci_bp_hardening(NULL);
#endif
/*
* Enable GIC and timers.
*/