ASoC: wsa881x: update version based default register values

Currently wsa881x default register table is defined for version 1.1. Some of the default register values are different for version 2.0. This change is to update default register values based on version. Change-Id: Ibfd3efd685786fc8d8a94ddb74175e5f6f9aa43e Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
2015-07-31 16:46:19 -07:00 · 2015-07-31 16:46:19 -07:00 · 728f6b87bb
parent 5979e10dbc
commit 728f6b87bb
5 changed files with 124 additions and 21 deletions
--- a/sound/soc/codecs/wsa881x-registers.h
+++ b/sound/soc/codecs/wsa881x-registers.h
@ -29,6 +29,8 @@
 #define WSA881X_CLOCK_CONFIG			(WSA881X_DIGITAL_BASE+0x0009)
 #define WSA881X_ANA_CTL				(WSA881X_DIGITAL_BASE+0x000A)
 #define WSA881X_SWR_RESET_EN			(WSA881X_DIGITAL_BASE+0x000B)
+#define WSA881X_RESET_CTL			(WSA881X_DIGITAL_BASE+0x000C)
+#define WSA881X_TADC_VALUE_CTL			(WSA881X_DIGITAL_BASE+0x000F)
 #define WSA881X_TEMP_DETECT_CTL			(WSA881X_DIGITAL_BASE+0x0010)
 #define WSA881X_TEMP_MSB			(WSA881X_DIGITAL_BASE+0x0011)
 #define WSA881X_TEMP_LSB			(WSA881X_DIGITAL_BASE+0x0012)
@ -67,6 +69,7 @@
 #define WSA881X_TEMP_DEBUG_MSB			(WSA881X_DIGITAL_BASE+0x003E)
 #define WSA881X_TEMP_DEBUG_LSB			(WSA881X_DIGITAL_BASE+0x003F)
 #define WSA881X_SAMPLE_EDGE_SEL			(WSA881X_DIGITAL_BASE+0x0044)
+#define WSA881X_IOPAD_CTL			(WSA881X_DIGITAL_BASE+0x0045)
 #define WSA881X_SPARE_0				(WSA881X_DIGITAL_BASE+0x0050)
 #define WSA881X_SPARE_1				(WSA881X_DIGITAL_BASE+0x0051)
 #define WSA881X_SPARE_2				(WSA881X_DIGITAL_BASE+0x0052)
--- a/sound/soc/codecs/wsa881x-regmap.c
+++ b/sound/soc/codecs/wsa881x-regmap.c
@ -16,6 +16,12 @@
 #include "wsa881x-registers.h"
 #include "wsa881x.h"

+/*
+ * Default register reset values that are common across different versions
+ * are defined here. If a register reset value is changed based on version
+ * then remove it from this structure and add it in version specific
+ * structures.
+ */
 static struct reg_default wsa881x_defaults[] = {
 	{WSA881X_CHIP_ID0, 0x00},
 	{WSA881X_CHIP_ID1, 0x00},
@ -46,7 +52,6 @@ static struct reg_default wsa881x_defaults[] = {
 	{WSA881X_OTP_CTRL1, 0x00},
 	{WSA881X_HDRIVE_CTL_GROUP1, 0x00},
 	{WSA881X_INTR_MODE, 0x00},
-	{WSA881X_INTR_MASK, 0x1F},
 	{WSA881X_INTR_STATUS, 0x00},
 	{WSA881X_INTR_CLEAR, 0x00},
 	{WSA881X_INTR_LEVEL, 0x00},
@ -98,10 +103,6 @@ static struct reg_default wsa881x_defaults[] = {
 	{WSA881X_OTP_REG_25, 0x01},
 	{WSA881X_OTP_REG_26, 0x03},
 	{WSA881X_OTP_REG_27, 0x11},
-	{WSA881X_OTP_REG_28, 0xFF},
-	{WSA881X_OTP_REG_29, 0xFF},
-	{WSA881X_OTP_REG_30, 0xFF},
-	{WSA881X_OTP_REG_31, 0xFF},
 	{WSA881X_OTP_REG_63, 0x40},
 	/* WSA881x Analog registers */
 	{WSA881X_BIAS_REF_CTRL, 0x6C},
@ -113,41 +114,29 @@ static struct reg_default wsa881x_defaults[] = {
 	{WSA881X_TEMP_CLK_CTRL, 0x87},
 	{WSA881X_TEMP_TEST, 0x00},
 	{WSA881X_TEMP_BIAS, 0x51},
-	{WSA881X_TEMP_ADC_CTRL, 0x00},
 	{WSA881X_TEMP_DOUT_MSB, 0x00},
 	{WSA881X_TEMP_DOUT_LSB, 0x00},
 	{WSA881X_ADC_EN_MODU_V, 0x00},
 	{WSA881X_ADC_EN_MODU_I, 0x00},
 	{WSA881X_ADC_EN_DET_TEST_V, 0x00},
 	{WSA881X_ADC_EN_DET_TEST_I, 0x00},
-	{WSA881X_ADC_SEL_IBIAS, 0x25},
 	{WSA881X_ADC_EN_SEL_IBAIS, 0x10},
 	{WSA881X_SPKR_DRV_EN, 0x74},
-	{WSA881X_SPKR_DRV_GAIN, 0x01},
-	{WSA881X_SPKR_DAC_CTL, 0x40},
 	{WSA881X_SPKR_DRV_DBG, 0x15},
 	{WSA881X_SPKR_PWRSTG_DBG, 0x00},
 	{WSA881X_SPKR_OCP_CTL, 0xD4},
 	{WSA881X_SPKR_CLIP_CTL, 0x90},
-	{WSA881X_SPKR_BBM_CTL, 0x00},
-	{WSA881X_SPKR_MISC_CTL1, 0x80},
-	{WSA881X_SPKR_MISC_CTL2, 0x00},
-	{WSA881X_SPKR_BIAS_INT, 0x56},
 	{WSA881X_SPKR_PA_INT, 0x54},
 	{WSA881X_SPKR_BIAS_CAL, 0xAC},
-	{WSA881X_SPKR_BIAS_PSRR, 0x54},
 	{WSA881X_SPKR_STATUS1, 0x00},
 	{WSA881X_SPKR_STATUS2, 0x00},
 	{WSA881X_BOOST_EN_CTL, 0x18},
 	{WSA881X_BOOST_CURRENT_LIMIT, 0x7A},
-	{WSA881X_BOOST_PS_CTL, 0xC0},
-	{WSA881X_BOOST_PRESET_OUT1, 0x77},
 	{WSA881X_BOOST_PRESET_OUT2, 0x70},
 	{WSA881X_BOOST_FORCE_OUT, 0x0E},
 	{WSA881X_BOOST_LDO_PROG, 0x16},
 	{WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x71},
 	{WSA881X_BOOST_RON_CTL, 0x0F},
-	{WSA881X_BOOST_LOOP_STABILITY, 0xAD},
 	{WSA881X_BOOST_ZX_CTL, 0x34},
 	{WSA881X_BOOST_START_CTL, 0x23},
 	{WSA881X_BOOST_MISC1_CTL, 0x80},
@ -159,15 +148,103 @@ static struct reg_default wsa881x_defaults[] = {
 	{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1, 0x8D},
 	{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2, 0x8D},
 	{WSA881X_SPKR_PROT_ATEST1, 0x01},
-	{WSA881X_SPKR_PROT_ATEST2, 0x00},
 	{WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x8D},
 	{WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1, 0x4D},
-	{WSA881X_BONGO_RESRV_REG1, 0x00},
-	{WSA881X_BONGO_RESRV_REG2, 0x00},
 	{WSA881X_SPKR_PROT_SAR, 0x00},
 	{WSA881X_SPKR_STATUS3, 0x00},
 };

+/* Default register reset values for WSA881x rev 1.0 or 1.1 */
+static struct reg_default wsa881x_rev_1_x[] = {
+	{WSA881X_INTR_MASK, 0x1F},
+	{WSA881X_OTP_REG_28, 0xFF},
+	{WSA881X_OTP_REG_29, 0xFF},
+	{WSA881X_OTP_REG_30, 0xFF},
+	{WSA881X_OTP_REG_31, 0xFF},
+	{WSA881X_TEMP_ADC_CTRL, 0x00},
+	{WSA881X_ADC_SEL_IBIAS, 0x25},
+	{WSA881X_SPKR_DRV_GAIN, 0x01},
+	{WSA881X_SPKR_DAC_CTL, 0x40},
+	{WSA881X_SPKR_BBM_CTL, 0x00},
+	{WSA881X_SPKR_MISC_CTL1, 0x80},
+	{WSA881X_SPKR_MISC_CTL2, 0x00},
+	{WSA881X_SPKR_BIAS_INT, 0x56},
+	{WSA881X_SPKR_BIAS_PSRR, 0x54},
+	{WSA881X_BOOST_PS_CTL, 0xC0},
+	{WSA881X_BOOST_PRESET_OUT1, 0x77},
+	{WSA881X_BOOST_LOOP_STABILITY, 0xAD},
+	{WSA881X_SPKR_PROT_ATEST2, 0x00},
+	{WSA881X_BONGO_RESRV_REG1, 0x00},
+	{WSA881X_BONGO_RESRV_REG2, 0x00},
+};
+
+/* Default register reset values for WSA881x rev 2.0 */
+static struct reg_default wsa881x_rev_2_0[] = {
+	{WSA881X_RESET_CTL, 0x00},
+	{WSA881X_TADC_VALUE_CTL, 0x01},
+	{WSA881X_INTR_MASK, 0x1B},
+	{WSA881X_IOPAD_CTL, 0x00},
+	{WSA881X_OTP_REG_28, 0x3F},
+	{WSA881X_OTP_REG_29, 0x3F},
+	{WSA881X_OTP_REG_30, 0x01},
+	{WSA881X_OTP_REG_31, 0x01},
+	{WSA881X_TEMP_ADC_CTRL, 0x03},
+	{WSA881X_ADC_SEL_IBIAS, 0x45},
+	{WSA881X_SPKR_DRV_GAIN, 0xC1},
+	{WSA881X_SPKR_DAC_CTL, 0x42},
+	{WSA881X_SPKR_BBM_CTL, 0x02},
+	{WSA881X_SPKR_MISC_CTL1, 0x40},
+	{WSA881X_SPKR_MISC_CTL2, 0x07},
+	{WSA881X_SPKR_BIAS_INT, 0x5F},
+	{WSA881X_SPKR_BIAS_PSRR, 0x44},
+	{WSA881X_BOOST_PS_CTL, 0xA0},
+	{WSA881X_BOOST_PRESET_OUT1, 0xB7},
+	{WSA881X_BOOST_LOOP_STABILITY, 0x8D},
+	{WSA881X_SPKR_PROT_ATEST2, 0x02},
+	{WSA881X_BONGO_RESRV_REG1, 0x5E},
+	{WSA881X_BONGO_RESRV_REG2, 0x07},
+};
+
+/*
+ * wsa881x_regmap_defaults - update regmap default register values
+ * @regmap: pointer to regmap structure
+ * @version: wsa881x version id
+ *
+ * Update regmap default register values based on version id
+ *
+ */
+void wsa881x_regmap_defaults(struct regmap *regmap, u8 version)
+{
+	u16 ret = 0;
+
+	if (!regmap) {
+		pr_debug("%s: regmap structure is NULL\n", __func__);
+		return;
+	}
+
+	switch (version) {
+	case WSA881X_1_X:
+		ret = regmap_register_patch(regmap,
+					    wsa881x_rev_1_x,
+					    ARRAY_SIZE(wsa881x_rev_1_x));
+		break;
+	case WSA881X_2_0:
+		ret = regmap_register_patch(regmap,
+					    wsa881x_rev_2_0,
+					    ARRAY_SIZE(wsa881x_rev_2_0));
+		break;
+	default:
+		pr_debug("%s: unknown version", __func__);
+		ret = -EINVAL;
+		break;
+	}
+
+	if (ret)
+		pr_debug("%s: Failed to update regmap defaults ret= %d\n",
+			 __func__, ret);
+}
+EXPORT_SYMBOL(wsa881x_regmap_defaults);
+
 static bool wsa881x_readable_register(struct device *dev, unsigned int reg)
 {
 	return wsa881x_reg_readable[reg];
--- a/sound/soc/codecs/wsa881x-tables.c
+++ b/sound/soc/codecs/wsa881x-tables.c
@ -28,6 +28,8 @@ const u8 wsa881x_reg_readable[WSA881X_CACHE_SIZE] = {
 	[WSA881X_CLOCK_CONFIG] = 1,
 	[WSA881X_ANA_CTL] = 1,
 	[WSA881X_SWR_RESET_EN] = 1,
+	[WSA881X_RESET_CTL] = 1,
+	[WSA881X_TADC_VALUE_CTL] = 1,
 	[WSA881X_TEMP_DETECT_CTL] = 1,
 	[WSA881X_TEMP_MSB] = 1,
 	[WSA881X_TEMP_LSB] = 1,
@ -66,6 +68,7 @@ const u8 wsa881x_reg_readable[WSA881X_CACHE_SIZE] = {
 	[WSA881X_TEMP_DEBUG_MSB] = 1,
 	[WSA881X_TEMP_DEBUG_LSB] = 1,
 	[WSA881X_SAMPLE_EDGE_SEL] = 1,
+	[WSA881X_IOPAD_CTL] = 1,
 	[WSA881X_SPARE_0] = 1,
 	[WSA881X_SPARE_1] = 1,
 	[WSA881X_SPARE_2] = 1,
--- a/sound/soc/codecs/wsa881x.c
+++ b/sound/soc/codecs/wsa881x.c
@ -97,6 +97,7 @@ struct wsa881x_priv {
 	struct wsa881x_tz_priv tz_pdata;
 	int bg_cnt;
 	int clk_cnt;
+	int version;
 	struct mutex bg_lock;
 	struct mutex res_lock;
 	struct snd_info_entry *entry;
@ -167,7 +168,12 @@ static ssize_t wsa881x_codec_version_read(struct snd_info_entry *entry,
 		return -EINVAL;
 	}

-	len = snprintf(buffer, sizeof(buffer), "WSA881X-SOUNDWIRE_1_0\n");
+	if (WSA881X_IS_2_0(wsa881x->version))
+		len = snprintf(buffer, sizeof(buffer),
+			       "WSA881X-SOUNDWIRE_2_0\n");
+	else
+		len = snprintf(buffer, sizeof(buffer),
+			       "WSA881X-SOUNDWIRE_1_0\n");

 	return simple_read_from_buffer(buf, count, &pos, buffer, len);
 }
@ -813,6 +819,10 @@ EXPORT_SYMBOL(wsa881x_set_channel_map);

 static void wsa881x_init(struct snd_soc_codec *codec)
 {
+	struct wsa881x_priv *wsa881x = snd_soc_codec_get_drvdata(codec);
+
+	wsa881x->version = snd_soc_read(codec, WSA881X_CHIP_ID1);
+	wsa881x_regmap_defaults(wsa881x->regmap, wsa881x->version);
 	/* Bring out of analog reset */
 	snd_soc_update_bits(codec, WSA881X_CDC_RST_CTL, 0x02, 0x02);
 	/* Bring out of digital reset */
--- a/sound/soc/codecs/wsa881x.h
+++ b/sound/soc/codecs/wsa881x.h
@ -20,6 +20,14 @@

 #define WSA881X_MAX_SWR_PORTS   4

+enum {
+	WSA881X_1_X = 0,
+	WSA881X_2_0,
+};
+
+#define WSA881X_IS_2_0(ver) \
+	((ver == WSA881X_2_0) ? 1 : 0)
+
 extern int wsa881x_set_channel_map(struct snd_soc_codec *codec, u8 *port,
 				u8 num_port, unsigned int *ch_mask,
 				unsigned int *ch_rate);
@ -29,4 +37,6 @@ extern struct regmap_config wsa881x_regmap_config;
 extern int wsa881x_codec_info_create_codec_entry(
 					struct snd_info_entry *codec_root,
 					struct snd_soc_codec *codec);
+void wsa881x_regmap_defaults(struct regmap *regmap, u8 version);
+
 #endif /* _WSA881X_H */