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Merge branch 'viafb-cleanup' into viafb-next

Browse source
This commit is contained in:
Florian Tobias Schandinat 2011-04-24 13:17:09 +00:00
commit 75ec72f8c5
13 changed files with 84 additions and 251 deletions
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6
drivers/video/via/chip.h
View file

@ -137,17 +137,11 @@ struct chip_information {
struct lvds_chip_information lvds_chip_info2;
};
struct crt_setting_information {
int iga_path;
};
struct tmds_setting_information {
int iga_path;
int h_active;
int v_active;
int max_pixel_clock;
int max_hres;
int max_vres;
};
struct lvds_setting_information {

160
drivers/video/via/dvi.c
View file

@ -28,17 +28,11 @@ static int tmds_register_read_bytes(int index, u8 *buff, int buff_len);
static void __devinit dvi_get_panel_size_from_DDCv1(
struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting);
static void __devinit dvi_get_panel_size_from_DDCv2(
struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting);
static int viafb_dvi_query_EDID(void);
static int check_tmds_chip(int device_id_subaddr, int device_id)
static inline bool check_tmds_chip(int device_id_subaddr, int device_id)
{
if (tmds_register_read(device_id_subaddr) == device_id)
return OK;
else
return FAIL;
return tmds_register_read(device_id_subaddr) == device_id;
}
void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
@ -47,22 +41,13 @@ void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n");
viafb_dvi_sense();
switch (viafb_dvi_query_EDID()) {
case 1:
if (viafb_dvi_query_EDID() == 1)
dvi_get_panel_size_from_DDCv1(tmds_chip, tmds_setting);
break;
case 2:
dvi_get_panel_size_from_DDCv2(tmds_chip, tmds_setting);
break;
default:
printk(KERN_WARNING "viafb_init_dvi_size: DVI panel size undetected!\n");
break;
}
return;
}
int __devinit viafb_tmds_trasmitter_identify(void)
bool __devinit viafb_tmds_trasmitter_identify(void)
{
unsigned char sr2a = 0, sr1e = 0, sr3e = 0;
@ -101,7 +86,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
viaparinfo->chip_info->
tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_31;
if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) != FAIL) {
if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) {
/*
* Currently only support 12bits,dual edge,add 24bits mode later
*/
@ -112,11 +97,10 @@ int __devinit viafb_tmds_trasmitter_identify(void)
viaparinfo->chip_info->tmds_chip_info.tmds_chip_name);
DEBUG_MSG(KERN_INFO "\n %2d",
viaparinfo->chip_info->tmds_chip_info.i2c_port);
return OK;
return true;
} else {
viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_2C;
if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)
!= FAIL) {
if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) {
tmds_register_write(0x08, 0x3b);
DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n");
DEBUG_MSG(KERN_INFO "\n %2d",
@ -125,7 +109,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
DEBUG_MSG(KERN_INFO "\n %2d",
viaparinfo->chip_info->
tmds_chip_info.i2c_port);
return OK;
return true;
}
}
@ -135,7 +119,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
((viafb_display_hardware_layout == HW_LAYOUT_DVI_ONLY) ||
(viafb_display_hardware_layout == HW_LAYOUT_LCD_DVI))) {
DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n");
return OK;
return true;
}
switch (viaparinfo->chip_info->gfx_chip_name) {
@ -159,7 +143,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER;
viaparinfo->chip_info->tmds_chip_info.
tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
return FAIL;
return false;
}
static void tmds_register_write(int index, u8 data)
@ -306,12 +290,7 @@ static int viafb_dvi_query_EDID(void)
return EDID_VERSION_1; /* Found EDID1 Table */
}
data0 = (u8) tmds_register_read(0x00);
viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
if (data0 == 0x20)
return EDID_VERSION_2; /* Found EDID2 Table */
else
return false;
return false;
}
/* Get Panel Size Using EDID1 Table */
@ -319,50 +298,15 @@ static void __devinit dvi_get_panel_size_from_DDCv1(
struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting)
{
int i, max_h = 0, tmp, restore;
unsigned char rData;
int i, restore;
unsigned char EDID_DATA[18];
DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n");
restore = tmds_chip->tmds_chip_slave_addr;
tmds_chip->tmds_chip_slave_addr = 0xA0;
rData = tmds_register_read(0x23);
if (rData & 0x3C)
max_h = 640;
if (rData & 0xC0)
max_h = 720;
if (rData & 0x03)
max_h = 800;
rData = tmds_register_read(0x24);
if (rData & 0xC0)
max_h = 800;
if (rData & 0x1E)
max_h = 1024;
if (rData & 0x01)
max_h = 1280;
for (i = 0x25; i < 0x6D; i++) {
switch (i) {
case 0x26:
case 0x28:
case 0x2A:
case 0x2C:
case 0x2E:
case 0x30:
case 0x32:
case 0x34:
rData = tmds_register_read(i);
if (rData == 1)
break;
/* data = (data + 31) * 8 */
tmp = (rData + 31) << 3;
if (tmp > max_h)
max_h = tmp;
break;
case 0x36:
case 0x48:
case 0x5A:
@ -383,91 +327,11 @@ static void __devinit dvi_get_panel_size_from_DDCv1(
}
}
tmds_setting->max_hres = max_h;
switch (max_h) {
case 640:
tmds_setting->max_vres = 480;
break;
case 800:
tmds_setting->max_vres = 600;
break;
case 1024:
tmds_setting->max_vres = 768;
break;
case 1280:
tmds_setting->max_vres = 1024;
break;
case 1400:
tmds_setting->max_vres = 1050;
break;
case 1440:
tmds_setting->max_vres = 1050;
break;
case 1600:
tmds_setting->max_vres = 1200;
break;
case 1920:
tmds_setting->max_vres = 1080;
break;
default:
DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d ! "
"set default panel size.\n", max_h);
break;
}
DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n",
tmds_setting->max_pixel_clock);
tmds_chip->tmds_chip_slave_addr = restore;
}
/* Get Panel Size Using EDID2 Table */
static void __devinit dvi_get_panel_size_from_DDCv2(
struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting)
{
int restore;
unsigned char R_Buffer[2];
DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n");
restore = tmds_chip->tmds_chip_slave_addr;
tmds_chip->tmds_chip_slave_addr = 0xA2;
/* Horizontal: 0x76, 0x77 */
tmds_register_read_bytes(0x76, R_Buffer, 2);
tmds_setting->max_hres = R_Buffer[0] + (R_Buffer[1] << 8);
switch (tmds_setting->max_hres) {
case 640:
tmds_setting->max_vres = 480;
break;
case 800:
tmds_setting->max_vres = 600;
break;
case 1024:
tmds_setting->max_vres = 768;
break;
case 1280:
tmds_setting->max_vres = 1024;
break;
case 1400:
tmds_setting->max_vres = 1050;
break;
case 1440:
tmds_setting->max_vres = 1050;
break;
case 1600:
tmds_setting->max_vres = 1200;
break;
default:
DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d! "
"set default panel size.\n", tmds_setting->max_hres);
break;
}
tmds_chip->tmds_chip_slave_addr = restore;
}
/* If Disable DVI, turn off pad */
void viafb_dvi_disable(void)
{

2
drivers/video/via/dvi.h
View file

@ -56,7 +56,7 @@
int viafb_dvi_sense(void);
void viafb_dvi_disable(void);
void viafb_dvi_enable(void);
int __devinit viafb_tmds_trasmitter_identify(void);
bool __devinit viafb_tmds_trasmitter_identify(void);
void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting);
void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp,

4
drivers/video/via/global.c
View file

@ -40,10 +40,6 @@ int viafb_hotplug_Yres = 480;
int viafb_hotplug_bpp = 32;
int viafb_hotplug_refresh = 60;
int viafb_primary_dev = None_Device;
unsigned int viafb_second_xres = 640;
unsigned int viafb_second_yres = 480;
unsigned int viafb_second_virtual_xres;
unsigned int viafb_second_virtual_yres;
int viafb_lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1;
struct fb_info *viafbinfo;
struct fb_info *viafbinfo1;

2
drivers/video/via/global.h
View file

@ -73,8 +73,6 @@ extern int viafb_hotplug_bpp;
extern int viafb_hotplug_refresh;
extern int viafb_primary_dev;
extern unsigned int viafb_second_xres;
extern unsigned int viafb_second_yres;
extern int viafb_lcd_panel_id;
#endif /* __GLOBAL_H__ */

88
drivers/video/via/hw.c
View file

@ -309,6 +309,42 @@ static struct io_reg scaling_parameters[] = {
{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */
};
static struct io_reg common_vga[] = {
{VIACR, CR07, 0x10, 0x10}, /* [0] vertical total (bit 8)
[1] vertical display end (bit 8)
[2] vertical retrace start (bit 8)
[3] start vertical blanking (bit 8)
[4] line compare (bit 8)
[5] vertical total (bit 9)
[6] vertical display end (bit 9)
[7] vertical retrace start (bit 9) */
{VIACR, CR08, 0xFF, 0x00}, /* [0-4] preset row scan
[5-6] byte panning */
{VIACR, CR09, 0xDF, 0x40}, /* [0-4] max scan line
[5] start vertical blanking (bit 9)
[6] line compare (bit 9)
[7] scan doubling */
{VIACR, CR0A, 0xFF, 0x1E}, /* [0-4] cursor start
[5] cursor disable */
{VIACR, CR0B, 0xFF, 0x00}, /* [0-4] cursor end
[5-6] cursor skew */
{VIACR, CR0E, 0xFF, 0x00}, /* [0-7] cursor location (high) */
{VIACR, CR0F, 0xFF, 0x00}, /* [0-7] cursor location (low) */
{VIACR, CR11, 0xF0, 0x80}, /* [0-3] vertical retrace end
[6] memory refresh bandwidth
[7] CRTC register protect enable */
{VIACR, CR14, 0xFF, 0x00}, /* [0-4] underline location
[5] divide memory address clock by 4
[6] double word addressing */
{VIACR, CR17, 0xFF, 0x63}, /* [0-1] mapping of display address 13-14
[2] divide scan line clock by 2
[3] divide memory address clock by 2
[5] address wrap
[6] byte mode select
[7] sync enable */
{VIACR, CR18, 0xFF, 0xFF}, /* [0-7] line compare */
};
static struct fifo_depth_select display_fifo_depth_reg = {
/* IGA1 FIFO Depth_Select */
{IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } },
@ -771,13 +807,14 @@ static u32 get_lcd_devices(int output_interface)
/*Set IGA path for each device*/
void viafb_set_iga_path(void)
{
int crt_iga_path = 0;
if (viafb_SAMM_ON == 1) {
if (viafb_CRT_ON) {
if (viafb_primary_dev == CRT_Device)
viaparinfo->crt_setting_info->iga_path = IGA1;
crt_iga_path = IGA1;
else
viaparinfo->crt_setting_info->iga_path = IGA2;
crt_iga_path = IGA2;
}
if (viafb_DVI_ON) {
@ -794,8 +831,7 @@ void viafb_set_iga_path(void)
UNICHROME_CLE266)) {
viaparinfo->
lvds_setting_info->iga_path = IGA2;
viaparinfo->
crt_setting_info->iga_path = IGA1;
crt_iga_path = IGA1;
viaparinfo->
tmds_setting_info->iga_path = IGA1;
} else
@ -815,10 +851,10 @@ void viafb_set_iga_path(void)
viafb_SAMM_ON = 0;
if (viafb_CRT_ON && viafb_LCD_ON) {
viaparinfo->crt_setting_info->iga_path = IGA1;
crt_iga_path = IGA1;
viaparinfo->lvds_setting_info->iga_path = IGA2;
} else if (viafb_CRT_ON && viafb_DVI_ON) {
viaparinfo->crt_setting_info->iga_path = IGA1;
crt_iga_path = IGA1;
viaparinfo->tmds_setting_info->iga_path = IGA2;
} else if (viafb_LCD_ON && viafb_DVI_ON) {
viaparinfo->tmds_setting_info->iga_path = IGA1;
@ -827,7 +863,7 @@ void viafb_set_iga_path(void)
viaparinfo->lvds_setting_info->iga_path = IGA2;
viaparinfo->lvds_setting_info2->iga_path = IGA2;
} else if (viafb_CRT_ON) {
viaparinfo->crt_setting_info->iga_path = IGA1;
crt_iga_path = IGA1;
} else if (viafb_LCD_ON) {
viaparinfo->lvds_setting_info->iga_path = IGA2;
} else if (viafb_DVI_ON) {
@ -838,7 +874,7 @@ void viafb_set_iga_path(void)
viaparinfo->shared->iga1_devices = 0;
viaparinfo->shared->iga2_devices = 0;
if (viafb_CRT_ON) {
if (viaparinfo->crt_setting_info->iga_path == IGA1)
if (crt_iga_path == IGA1)
viaparinfo->shared->iga1_devices |= VIA_CRT;
else
viaparinfo->shared->iga2_devices |= VIA_CRT;
@ -1167,25 +1203,17 @@ void via_odev_to_seq(struct seq_file *m, u32 odev)
static void load_fix_bit_crtc_reg(void)
{
viafb_unlock_crt();
/* always set to 1 */
viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7);
/* line compare should set all bits = 1 (extend modes) */
viafb_write_reg(CR18, VIACR, 0xff);
/* line compare should set all bits = 1 (extend modes) */
viafb_write_reg_mask(CR07, VIACR, 0x10, BIT4);
/* line compare should set all bits = 1 (extend modes) */
viafb_write_reg_mask(CR09, VIACR, 0x40, BIT6);
/* line compare should set all bits = 1 (extend modes) */
viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4);
/* line compare should set all bits = 1 (extend modes) */
viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2);
/*viafb_write_reg_mask(CR32, VIACR, 0x01, BIT0); */
/* extend mode always set to e3h */
viafb_write_reg(CR17, VIACR, 0xe3);
/* extend mode always set to 0h */
viafb_write_reg(CR08, VIACR, 0x00);
/* extend mode always set to 0h */
viafb_write_reg(CR14, VIACR, 0x00);
viafb_lock_crt();
/* If K8M800, enable Prefetch Mode. */
if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800)
@ -2038,8 +2066,6 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
v_addr = crt_reg.ver_addr;
if (set_iga == IGA1) {
viafb_unlock_crt();
viafb_write_reg(CR09, VIACR, 0x00); /*initial CR09=0 */
viafb_write_reg_mask(CR11, VIACR, 0x00, BIT4 + BIT5 + BIT6);
viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
}
@ -2052,7 +2078,6 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
break;
}
load_fix_bit_crtc_reg();
viafb_lock_crt();
viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga);
@ -2076,8 +2101,6 @@ void __devinit viafb_init_chip_info(int chip_type)
init_tmds_chip_info();
init_lvds_chip_info();
viaparinfo->crt_setting_info->iga_path = IGA1;
/*Set IGA path for each device */
viafb_set_iga_path();
@ -2359,6 +2382,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
outb(0x00, VIAAR);
/* Write Common Setting for Video Mode */
viafb_write_regx(common_vga, ARRAY_SIZE(common_vga));
switch (viaparinfo->chip_info->gfx_chip_name) {
case UNICHROME_CLE266:
viafb_write_regx(CLE266_ModeXregs, NUM_TOTAL_CLE266_ModeXregs);
@ -2405,9 +2429,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2);
/* Write CRTC */
viafb_fill_crtc_timing(crt_timing, vmode_tbl, video_bpp / 8, IGA1);
/* Write Graphic Controller */
for (i = 0; i < StdGR; i++)
via_write_reg(VIAGR, i, VPIT.GR[i]);
@ -2437,6 +2458,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
}
}
load_fix_bit_crtc_reg();
via_set_primary_pitch(viafbinfo->fix.line_length);
via_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length
: viafbinfo->fix.line_length);
@ -2456,15 +2478,15 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
/* CRT set mode */
if (viafb_CRT_ON) {
if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path ==
IGA2)) {
if (viafb_SAMM_ON &&
viaparinfo->shared->iga2_devices & VIA_CRT) {
viafb_fill_crtc_timing(crt_timing1, vmode_tbl1,
video_bpp1 / 8,
viaparinfo->crt_setting_info->iga_path);
video_bpp1 / 8, IGA2);
} else {
viafb_fill_crtc_timing(crt_timing, vmode_tbl,
video_bpp / 8,
viaparinfo->crt_setting_info->iga_path);
(viaparinfo->shared->iga1_devices & VIA_CRT)
? IGA1 : IGA2);
}
/* Patch if set_hres is not 8 alignment (1366) to viafb_setmode

1
drivers/video/via/hw.h
View file

@ -910,7 +910,6 @@ struct via_device_mapping {
const char *name;
};
extern unsigned int viafb_second_virtual_xres;
extern int viafb_SAMM_ON;
extern int viafb_dual_fb;
extern int viafb_LCD2_ON;

16
drivers/video/via/lcd.c
View file

@ -48,7 +48,6 @@ static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
{LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } }
};
static int check_lvds_chip(int device_id_subaddr, int device_id);
static bool lvds_identify_integratedlvds(void);
static void __devinit fp_id_to_vindex(int panel_id);
static int lvds_register_read(int index);
@ -84,12 +83,9 @@ static struct display_timing lcd_centering_timging(struct display_timing
mode_crt_reg,
struct display_timing panel_crt_reg);
static int check_lvds_chip(int device_id_subaddr, int device_id)
static inline bool check_lvds_chip(int device_id_subaddr, int device_id)
{
if (lvds_register_read(device_id_subaddr) == device_id)
return OK;
else
return FAIL;
return lvds_register_read(device_id_subaddr) == device_id;
}
void __devinit viafb_init_lcd_size(void)
@ -150,7 +146,7 @@ static bool lvds_identify_integratedlvds(void)
return true;
}
int __devinit viafb_lvds_trasmitter_identify(void)
bool __devinit viafb_lvds_trasmitter_identify(void)
{
if (viafb_lvds_identify_vt1636(VIA_PORT_31)) {
viaparinfo->chip_info->lvds_chip_info.i2c_port = VIA_PORT_31;
@ -175,20 +171,20 @@ int __devinit viafb_lvds_trasmitter_identify(void)
viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
VT1631_LVDS_I2C_ADDR;
if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID) != FAIL) {
if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID)) {
DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n");
DEBUG_MSG(KERN_INFO "\n %2d",
viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
DEBUG_MSG(KERN_INFO "\n %2d",
viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
return OK;
return true;
}
viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
NON_LVDS_TRANSMITTER;
viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
VT1631_LVDS_I2C_ADDR;
return FAIL;
return false;
}
static void __devinit fp_id_to_vindex(int panel_id)

2
drivers/video/via/lcd.h
View file

@ -79,7 +79,7 @@ void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information
void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
struct lvds_setting_information *plvds_setting_info,
struct lvds_chip_information *plvds_chip_info);
int __devinit viafb_lvds_trasmitter_identify(void);
bool __devinit viafb_lvds_trasmitter_identify(void);
void viafb_init_lvds_output_interface(struct lvds_chip_information
*plvds_chip_info,
struct lvds_setting_information

8
drivers/video/via/share.h
View file

@ -22,14 +22,6 @@
#ifndef __SHARE_H__
#define __SHARE_H__
/* Define Return Value */
#define FAIL -1
#define OK 1
#ifndef NULL
#define NULL 0
#endif
/* Define Bit Field */
#define BIT0 0x01
#define BIT1 0x02

23
drivers/video/via/viafbdev.c
View file

@ -37,6 +37,8 @@ static char *viafb_mode1;
static int viafb_bpp = 32;
static int viafb_bpp1 = 32;
static unsigned int viafb_second_xres = 640;
static unsigned int viafb_second_yres = 480;
static unsigned int viafb_second_offset;
static int viafb_second_size;
@ -440,8 +442,8 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
if (viafb_SAMM_ON == 1) {
u.viamode.xres_sec = viafb_second_xres;
u.viamode.yres_sec = viafb_second_yres;
u.viamode.virtual_xres_sec = viafb_second_virtual_xres;
u.viamode.virtual_yres_sec = viafb_second_virtual_yres;
u.viamode.virtual_xres_sec = viafb_dual_fb ? viafbinfo1->var.xres_virtual : viafbinfo->var.xres_virtual;
u.viamode.virtual_yres_sec = viafb_dual_fb ? viafbinfo1->var.yres_virtual : viafbinfo->var.yres_virtual;
u.viamode.refresh_sec = viafb_refresh1;
u.viamode.bpp_sec = viafb_bpp1;
} else {
@ -930,10 +932,8 @@ static int get_primary_device(void)
/* Rule: device on iga1 path are the primary device. */
if (viafb_SAMM_ON) {
if (viafb_CRT_ON) {
if (viaparinfo->crt_setting_info->iga_path == IGA1) {
DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n",
viaparinfo->
crt_setting_info->iga_path);
if (viaparinfo->shared->iga1_devices & VIA_CRT) {
DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", IGA1);
primary_device = CRT_Device;
}
}
@ -1746,7 +1746,6 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev)
viaparinfo->lvds_setting_info = &viaparinfo->shared->lvds_setting_info;
viaparinfo->lvds_setting_info2 =
&viaparinfo->shared->lvds_setting_info2;
viaparinfo->crt_setting_info = &viaparinfo->shared->crt_setting_info;
viaparinfo->chip_info = &viaparinfo->shared->chip_info;
if (viafb_dual_fb)
@ -1793,14 +1792,10 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev)
parse_mode(viafb_mode, &default_xres, &default_yres);
vmode_entry = viafb_get_mode(default_xres, default_yres);
if (viafb_SAMM_ON == 1) {
if (viafb_SAMM_ON == 1)
parse_mode(viafb_mode1, &viafb_second_xres,
&viafb_second_yres);
viafb_second_virtual_xres = viafb_second_xres;
viafb_second_virtual_yres = viafb_second_yres;
}
default_var.xres = default_xres;
default_var.yres = default_yres;
default_var.xres_virtual = default_xres;
@ -1844,8 +1839,8 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev)
default_var.xres = viafb_second_xres;
default_var.yres = viafb_second_yres;
default_var.xres_virtual = viafb_second_virtual_xres;
default_var.yres_virtual = viafb_second_virtual_yres;
default_var.xres_virtual = viafb_second_xres;
default_var.yres_virtual = viafb_second_yres;
default_var.bits_per_pixel = viafb_bpp1;
viafb_fill_var_timing_info(&default_var, viafb_get_refresh(
default_var.xres, default_var.yres, viafb_refresh1),

4
drivers/video/via/viafbdev.h
View file

@ -50,7 +50,6 @@ struct viafb_shared {
/* All the information will be needed to set engine */
struct tmds_setting_information tmds_setting_info;
struct crt_setting_information crt_setting_info;
struct lvds_setting_information lvds_setting_info;
struct lvds_setting_information lvds_setting_info2;
struct chip_information chip_info;
@ -79,14 +78,11 @@ struct viafb_par {
/* All the information will be needed to set engine */
/* depreciated, use the ones in shared directly */
struct tmds_setting_information *tmds_setting_info;
struct crt_setting_information *crt_setting_info;
struct lvds_setting_information *lvds_setting_info;
struct lvds_setting_information *lvds_setting_info2;
struct chip_information *chip_info;
};
extern unsigned int viafb_second_virtual_yres;
extern unsigned int viafb_second_virtual_xres;
extern int viafb_SAMM_ON;
extern int viafb_dual_fb;
extern int viafb_LCD2_ON;

19
drivers/video/via/viamode.c
View file

@ -30,10 +30,6 @@ struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
{VIASR, SR1A, 0xFB, 0x08},
{VIASR, SR1E, 0x0F, 0x01},
{VIASR, SR2A, 0xFF, 0x00},
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
{VIACR, CR32, 0xFF, 0x00},
{VIACR, CR33, 0xFF, 0x00},
{VIACR, CR35, 0xFF, 0x00},
@ -125,10 +121,6 @@ struct io_reg KM400_ModeXregs[] = {
{VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */
{VIASR, SR2D, 0xFF, 0xFF}, /* Power Management Control 1 */
{VIASR, SR2E, 0xFF, 0xFF}, /* Power Management Control 2 */
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
{VIACR, CR33, 0xFF, 0x00},
{VIACR, CR55, 0x80, 0x00},
{VIACR, CR5D, 0x80, 0x00},
@ -162,10 +154,6 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
{VIASR, SR1E, 0xFF, 0x01},
{VIASR, SR2A, 0xFF, 0x00},
{VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
{VIACR, CR32, 0xFF, 0x00},
{VIACR, CR33, 0xFF, 0x00},
{VIACR, CR35, 0xFF, 0x00},
@ -205,13 +193,6 @@ struct io_reg VX855_ModeXregs[] = {
{VIASR, SR58, 0xFF, 0x00},
{VIASR, SR59, 0xFF, 0x00},
{VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */
{VIACR, CR09, 0xFF, 0x00}, /* Initial CR09=0*/
{VIACR, CR11, 0x8F, 0x00}, /* IGA1 initial Vertical end */
{VIACR, CR17, 0x7F, 0x00}, /* IGA1 CRT Mode control init */
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
{VIACR, CR32, 0xFF, 0x00},
{VIACR, CR33, 0x7F, 0x00},
{VIACR, CR35, 0xFF, 0x00},