mirror of
https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-11-07 04:09:21 +00:00
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/ttm: Read buffer overflow drm/radeon: Read buffer overflow drm/ttm: Fix a sync object leak. drm/radeon/kms: fix memory leak in radeon_driver_load_kms drm/radeon/kms: fix nomodeset. drm/ttm: Fix a potential comparison of structs. drm/radeon/kms: fix rv515 VRAM initialisation. drm/radeon: add some new r7xx pci ids drm: Catch stop possible NULL pointer reference drm: Small logic fix in drm_mode_setcrtc
This commit is contained in:
commit
78ec75cd1c
9 changed files with 33 additions and 18 deletions
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@ -1461,7 +1461,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
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goto out;
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goto out;
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}
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}
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if (crtc_req->count_connectors > 0 && !mode && !fb) {
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if (crtc_req->count_connectors > 0 && (!mode || !fb)) {
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DRM_DEBUG("Count connectors is %d but no mode or fb set\n",
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DRM_DEBUG("Count connectors is %d but no mode or fb set\n",
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crtc_req->count_connectors);
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crtc_req->count_connectors);
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ret = -EINVAL;
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ret = -EINVAL;
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@ -706,8 +706,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
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struct drm_encoder **save_encoders, *new_encoder;
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struct drm_encoder **save_encoders, *new_encoder;
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struct drm_framebuffer *old_fb = NULL;
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struct drm_framebuffer *old_fb = NULL;
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bool save_enabled;
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bool save_enabled;
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bool mode_changed = false;
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bool mode_changed = false; /* if true do a full mode set */
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bool fb_changed = false;
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bool fb_changed = false; /* if true and !mode_changed just do a flip */
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struct drm_connector *connector;
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struct drm_connector *connector;
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int count = 0, ro, fail = 0;
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int count = 0, ro, fail = 0;
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struct drm_crtc_helper_funcs *crtc_funcs;
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struct drm_crtc_helper_funcs *crtc_funcs;
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@ -758,6 +758,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
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if (set->crtc->fb == NULL) {
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if (set->crtc->fb == NULL) {
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DRM_DEBUG("crtc has no fb, full mode set\n");
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DRM_DEBUG("crtc has no fb, full mode set\n");
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mode_changed = true;
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mode_changed = true;
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} else if (set->fb == NULL) {
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mode_changed = true;
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} else if ((set->fb->bits_per_pixel !=
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} else if ((set->fb->bits_per_pixel !=
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set->crtc->fb->bits_per_pixel) ||
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set->crtc->fb->bits_per_pixel) ||
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set->fb->depth != set->crtc->fb->depth)
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set->fb->depth != set->crtc->fb->depth)
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@ -722,13 +722,14 @@ int r100_cs_packet_parse(struct radeon_cs_parser *p,
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unsigned idx)
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unsigned idx)
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{
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{
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struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
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struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
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uint32_t header = ib_chunk->kdata[idx];
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uint32_t header;
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if (idx >= ib_chunk->length_dw) {
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if (idx >= ib_chunk->length_dw) {
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DRM_ERROR("Can not parse packet at %d after CS end %d !\n",
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DRM_ERROR("Can not parse packet at %d after CS end %d !\n",
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idx, ib_chunk->length_dw);
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idx, ib_chunk->length_dw);
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return -EINVAL;
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return -EINVAL;
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}
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}
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header = ib_chunk->kdata[idx];
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pkt->idx = idx;
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pkt->idx = idx;
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pkt->type = CP_PACKET_GET_TYPE(header);
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pkt->type = CP_PACKET_GET_TYPE(header);
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pkt->count = CP_PACKET_GET_COUNT(header);
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pkt->count = CP_PACKET_GET_COUNT(header);
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@ -318,6 +318,14 @@ static int __init radeon_init(void)
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driver = &driver_old;
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driver = &driver_old;
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driver->num_ioctls = radeon_max_ioctl;
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driver->num_ioctls = radeon_max_ioctl;
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#if defined(CONFIG_DRM_RADEON_KMS)
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#if defined(CONFIG_DRM_RADEON_KMS)
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#ifdef CONFIG_VGA_CONSOLE
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if (vgacon_text_force() && radeon_modeset == -1) {
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DRM_INFO("VGACON disable radeon kernel modesetting.\n");
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driver = &driver_old;
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driver->driver_features &= ~DRIVER_MODESET;
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radeon_modeset = 0;
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}
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#endif
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/* if enabled by default */
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/* if enabled by default */
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if (radeon_modeset == -1) {
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if (radeon_modeset == -1) {
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DRM_INFO("radeon default to kernel modesetting.\n");
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DRM_INFO("radeon default to kernel modesetting.\n");
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@ -329,17 +337,8 @@ static int __init radeon_init(void)
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driver->driver_features |= DRIVER_MODESET;
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driver->driver_features |= DRIVER_MODESET;
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driver->num_ioctls = radeon_max_kms_ioctl;
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driver->num_ioctls = radeon_max_kms_ioctl;
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}
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}
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/* if the vga console setting is enabled still
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/* if the vga console setting is enabled still
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* let modprobe override it */
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* let modprobe override it */
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#ifdef CONFIG_VGA_CONSOLE
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if (vgacon_text_force() && radeon_modeset == -1) {
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DRM_INFO("VGACON disable radeon kernel modesetting.\n");
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driver = &driver_old;
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driver->driver_features &= ~DRIVER_MODESET;
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radeon_modeset = 0;
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}
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#endif
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#endif
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#endif
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return drm_init(driver);
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return drm_init(driver);
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}
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}
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@ -58,6 +58,8 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
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if (r) {
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if (r) {
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DRM_ERROR("Failed to initialize radeon, disabling IOCTL\n");
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DRM_ERROR("Failed to initialize radeon, disabling IOCTL\n");
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radeon_device_fini(rdev);
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radeon_device_fini(rdev);
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kfree(rdev);
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dev->dev_private = NULL;
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return r;
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return r;
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}
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}
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return 0;
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return 0;
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@ -370,6 +370,7 @@ void rv515_vram_info(struct radeon_device *rdev)
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rv515_vram_get_type(rdev);
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rv515_vram_get_type(rdev);
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r100_vram_init_sizes(rdev);
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/* FIXME: we should enforce default clock in case GPU is not in
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/* FIXME: we should enforce default clock in case GPU is not in
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* default setup
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* default setup
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*/
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*/
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@ -1182,13 +1182,14 @@ static int ttm_bo_force_list_clean(struct ttm_bo_device *bdev,
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int ttm_bo_clean_mm(struct ttm_bo_device *bdev, unsigned mem_type)
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int ttm_bo_clean_mm(struct ttm_bo_device *bdev, unsigned mem_type)
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{
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{
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struct ttm_mem_type_manager *man = &bdev->man[mem_type];
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struct ttm_mem_type_manager *man;
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int ret = -EINVAL;
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int ret = -EINVAL;
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if (mem_type >= TTM_NUM_MEM_TYPES) {
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if (mem_type >= TTM_NUM_MEM_TYPES) {
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printk(KERN_ERR TTM_PFX "Illegal memory type %d\n", mem_type);
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printk(KERN_ERR TTM_PFX "Illegal memory type %d\n", mem_type);
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return ret;
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return ret;
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}
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}
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man = &bdev->man[mem_type];
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if (!man->has_type) {
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if (!man->has_type) {
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printk(KERN_ERR TTM_PFX "Trying to take down uninitialized "
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printk(KERN_ERR TTM_PFX "Trying to take down uninitialized "
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@ -1575,6 +1576,10 @@ int ttm_bo_wait(struct ttm_buffer_object *bo,
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driver->sync_obj_unref(&sync_obj);
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driver->sync_obj_unref(&sync_obj);
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driver->sync_obj_unref(&tmp_obj);
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driver->sync_obj_unref(&tmp_obj);
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spin_lock(&bo->lock);
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spin_lock(&bo->lock);
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} else {
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spin_unlock(&bo->lock);
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driver->sync_obj_unref(&sync_obj);
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spin_lock(&bo->lock);
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}
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}
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}
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}
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return 0;
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return 0;
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@ -150,7 +150,7 @@ static int ttm_copy_io_ttm_page(struct ttm_tt *ttm, void *src,
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#ifdef CONFIG_X86
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#ifdef CONFIG_X86
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dst = kmap_atomic_prot(d, KM_USER0, prot);
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dst = kmap_atomic_prot(d, KM_USER0, prot);
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#else
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#else
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if (prot != PAGE_KERNEL)
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if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
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dst = vmap(&d, 1, 0, prot);
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dst = vmap(&d, 1, 0, prot);
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else
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else
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dst = kmap(d);
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dst = kmap(d);
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@ -163,7 +163,7 @@ static int ttm_copy_io_ttm_page(struct ttm_tt *ttm, void *src,
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#ifdef CONFIG_X86
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#ifdef CONFIG_X86
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kunmap_atomic(dst, KM_USER0);
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kunmap_atomic(dst, KM_USER0);
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#else
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#else
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if (prot != PAGE_KERNEL)
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if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
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vunmap(dst);
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vunmap(dst);
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else
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else
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kunmap(d);
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kunmap(d);
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@ -186,7 +186,7 @@ static int ttm_copy_ttm_io_page(struct ttm_tt *ttm, void *dst,
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#ifdef CONFIG_X86
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#ifdef CONFIG_X86
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src = kmap_atomic_prot(s, KM_USER0, prot);
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src = kmap_atomic_prot(s, KM_USER0, prot);
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#else
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#else
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if (prot != PAGE_KERNEL)
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if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
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src = vmap(&s, 1, 0, prot);
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src = vmap(&s, 1, 0, prot);
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else
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else
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src = kmap(s);
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src = kmap(s);
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@ -199,7 +199,7 @@ static int ttm_copy_ttm_io_page(struct ttm_tt *ttm, void *dst,
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#ifdef CONFIG_X86
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#ifdef CONFIG_X86
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kunmap_atomic(src, KM_USER0);
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kunmap_atomic(src, KM_USER0);
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#else
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#else
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if (prot != PAGE_KERNEL)
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if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
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vunmap(src);
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vunmap(src);
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else
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else
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kunmap(s);
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kunmap(s);
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@ -257,9 +257,12 @@
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{0x1002, 0x940F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x940F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x94B9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9442, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9442, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \
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@ -288,6 +291,7 @@
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{0x1002, 0x948F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x948F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9490, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9490, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9491, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9491, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9495, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9498, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9498, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x949C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x949C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x949E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x949E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \
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@ -325,6 +329,7 @@
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{0x1002, 0x9552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
{0x1002, 0x9552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9553, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
{0x1002, 0x9553, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9555, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9555, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9557, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9580, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9580, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \
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||||||
{0x1002, 0x9581, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9581, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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||||||
{0x1002, 0x9583, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x9583, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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||||||
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