ARM: tegra: only run PL310 init on systems with one

commit 8859685785bfafadf9bc922dd3a2278e59886947 upstream.

Fix tegra_init_cache() to check whether the system has a PL310 cache
before touching the PL310 registers. This prevents access to non-existent
registers on Tegra114 and later.

Note for stable kernels:
In <= v3.12, the file to patch is arch/arm/mach-tegra/common.c.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Stephen Warren 2014-02-18 16:51:58 -07:00 committed by Greg Kroah-Hartman
parent c56e0dc1b7
commit 79e4382609

View file

@ -22,6 +22,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/of.h>
#include <linux/irqchip.h> #include <linux/irqchip.h>
#include <linux/clk/tegra.h> #include <linux/clk/tegra.h>
@ -80,10 +81,20 @@ void tegra_assert_system_reset(char mode, const char *cmd)
static void __init tegra_init_cache(void) static void __init tegra_init_cache(void)
{ {
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
static const struct of_device_id pl310_ids[] __initconst = {
{ .compatible = "arm,pl310-cache", },
{}
};
struct device_node *np;
int ret; int ret;
void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
u32 aux_ctrl, cache_type; u32 aux_ctrl, cache_type;
np = of_find_matching_node(NULL, pl310_ids);
if (!np)
return;
cache_type = readl(p + L2X0_CACHE_TYPE); cache_type = readl(p + L2X0_CACHE_TYPE);
aux_ctrl = (cache_type & 0x700) << (17-8); aux_ctrl = (cache_type & 0x700) << (17-8);
aux_ctrl |= 0x7C400001; aux_ctrl |= 0x7C400001;