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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-11-07 04:09:21 +00:00
sata_mv: Remove PCI dependency
The integrated SATA controller is connected directly to the SoC's internal bus, not via PCI interface. this patch removes the dependency on the PCI interface. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Saeed Bishara
Jeff Garzik
parent
1fd2e1c242
commit
7bb3c5290c
2 changed files with 75 additions and 59 deletions
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@ -69,7 +69,7 @@ config ATA_PIIX
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config SATA_MV
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tristate "Marvell SATA support (HIGHLY EXPERIMENTAL)"
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depends on PCI && EXPERIMENTAL
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depends on EXPERIMENTAL
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help
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This option enables support for the Marvell Serial ATA family.
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Currently supports 88SX[56]0[48][01] chips.
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@ -127,6 +127,9 @@ enum {
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/* Host Flags */
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MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */
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MV_FLAG_IRQ_COALESCE = (1 << 29), /* IRQ coalescing capability */
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/* SoC integrated controllers, no PCI interface */
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MV_FLAG_SOC = (1 << 28),
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MV_COMMON_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
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ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI |
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ATA_FLAG_PIO_POLLING,
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@ -340,6 +343,7 @@ enum {
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#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
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#define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II)
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#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
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#define HAS_PCI(host) (!((host)->ports[0]->flags & MV_FLAG_SOC))
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enum {
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/* DMA boundary 0xffff is required by the s/g splitting
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@ -442,7 +446,7 @@ struct mv_hw_ops {
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int (*reset_hc)(struct mv_host_priv *hpriv, void __iomem *mmio,
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unsigned int n_hc);
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void (*reset_flash)(struct mv_host_priv *hpriv, void __iomem *mmio);
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void (*reset_bus)(struct pci_dev *pdev, void __iomem *mmio);
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void (*reset_bus)(struct ata_host *host, void __iomem *mmio);
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};
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static void mv_irq_clear(struct ata_port *ap);
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@ -459,7 +463,6 @@ static void mv_error_handler(struct ata_port *ap);
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static void mv_eh_freeze(struct ata_port *ap);
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static void mv_eh_thaw(struct ata_port *ap);
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static void mv6_dev_config(struct ata_device *dev);
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static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
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static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
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unsigned int port);
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@ -469,7 +472,7 @@ static void mv5_read_preamp(struct mv_host_priv *hpriv, int idx,
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static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
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unsigned int n_hc);
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static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio);
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static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio);
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static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio);
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static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
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unsigned int port);
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@ -479,7 +482,7 @@ static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx,
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static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
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unsigned int n_hc);
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static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio);
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static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio);
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static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio);
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static void mv_channel_reset(struct mv_host_priv *hpriv, void __iomem *mmio,
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unsigned int port_no);
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static void mv_edma_cfg(struct mv_port_priv *pp, struct mv_host_priv *hpriv,
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@ -690,13 +693,6 @@ static const struct pci_device_id mv_pci_tbl[] = {
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{ } /* terminate list */
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};
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static struct pci_driver mv_pci_driver = {
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.name = DRV_NAME,
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.id_table = mv_pci_tbl,
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.probe = mv_init_one,
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.remove = ata_pci_remove_one,
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};
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static const struct mv_hw_ops mv5xxx_ops = {
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.phy_errata = mv5_phy_errata,
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.enable_leds = mv5_enable_leds,
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@ -715,45 +711,6 @@ static const struct mv_hw_ops mv6xxx_ops = {
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.reset_bus = mv_reset_pci_bus,
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};
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/*
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* module options
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*/
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static int msi; /* Use PCI msi; either zero (off, default) or non-zero */
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/* move to PCI layer or libata core? */
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static int pci_go_64(struct pci_dev *pdev)
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{
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int rc;
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if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
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if (rc) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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if (rc) {
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dev_printk(KERN_ERR, &pdev->dev,
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"64-bit DMA enable failed\n");
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return rc;
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}
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}
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} else {
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rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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if (rc) {
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dev_printk(KERN_ERR, &pdev->dev,
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"32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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if (rc) {
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dev_printk(KERN_ERR, &pdev->dev,
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"32-bit consistent DMA enable failed\n");
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return rc;
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}
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}
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return rc;
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}
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/*
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* Functions
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*/
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@ -1823,7 +1780,7 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance)
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n_hcs = mv_get_hc_count(host->ports[0]->flags);
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if (unlikely(irq_stat & PCI_ERR)) {
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if (unlikely((irq_stat & PCI_ERR) && HAS_PCI(host))) {
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mv_pci_error(host, mmio);
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handled = 1;
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goto out_unlock; /* skip all other HC irq handling */
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@ -1894,8 +1851,9 @@ static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val)
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return -EINVAL;
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}
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static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio)
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static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio)
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{
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struct pci_dev *pdev = to_pci_dev(host->dev);
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int early_5080;
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early_5080 = (pdev->device == 0x5080) && (pdev->revision == 0);
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@ -1906,7 +1864,7 @@ static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio)
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writel(tmp, mmio + MV_PCI_EXP_ROM_BAR_CTL);
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}
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mv_reset_pci_bus(pdev, mmio);
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mv_reset_pci_bus(host, mmio);
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}
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static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio)
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@ -2030,9 +1988,8 @@ static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
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#undef ZERO
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#define ZERO(reg) writel(0, mmio + (reg))
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static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio)
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static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct mv_host_priv *hpriv = host->private_data;
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u32 tmp;
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@ -2676,7 +2633,6 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
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static int mv_init_host(struct ata_host *host, unsigned int board_idx)
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{
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int rc = 0, n_hc, port, hc;
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struct pci_dev *pdev = to_pci_dev(host->dev);
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void __iomem *mmio = host->iomap[MV_PRIMARY_BAR];
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struct mv_host_priv *hpriv = host->private_data;
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@ -2697,7 +2653,7 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
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goto done;
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hpriv->ops->reset_flash(hpriv, mmio);
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hpriv->ops->reset_bus(pdev, mmio);
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hpriv->ops->reset_bus(host, mmio);
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hpriv->ops->enable_leds(hpriv, mmio);
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for (port = 0; port < host->n_ports; port++) {
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@ -2720,8 +2676,10 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
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mv_port_init(&ap->ioaddr, port_mmio);
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#ifdef CONFIG_PCI
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ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
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ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
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#endif
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}
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for (hc = 0; hc < n_hc; hc++) {
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@ -2758,6 +2716,55 @@ done:
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return rc;
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}
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#ifdef CONFIG_PCI
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static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
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static struct pci_driver mv_pci_driver = {
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.name = DRV_NAME,
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.id_table = mv_pci_tbl,
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.probe = mv_init_one,
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.remove = ata_pci_remove_one,
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};
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/*
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* module options
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*/
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static int msi; /* Use PCI msi; either zero (off, default) or non-zero */
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/* move to PCI layer or libata core? */
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static int pci_go_64(struct pci_dev *pdev)
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{
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int rc;
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if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
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if (rc) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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if (rc) {
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dev_printk(KERN_ERR, &pdev->dev,
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"64-bit DMA enable failed\n");
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return rc;
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}
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}
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} else {
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rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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if (rc) {
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dev_printk(KERN_ERR, &pdev->dev,
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"32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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if (rc) {
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dev_printk(KERN_ERR, &pdev->dev,
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"32-bit consistent DMA enable failed\n");
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return rc;
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}
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}
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return rc;
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}
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/**
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* mv_print_info - Dump key info to kernel log for perusal.
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* @host: ATA host to print info about
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@ -2886,15 +2893,22 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED,
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IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht);
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}
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#endif
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static int __init mv_init(void)
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{
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return pci_register_driver(&mv_pci_driver);
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int rc = -ENODEV;
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#ifdef CONFIG_PCI
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rc = pci_register_driver(&mv_pci_driver);
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#endif
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return rc;
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}
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static void __exit mv_exit(void)
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{
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#ifdef CONFIG_PCI
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pci_unregister_driver(&mv_pci_driver);
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#endif
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}
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MODULE_AUTHOR("Brett Russ");
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@ -2903,8 +2917,10 @@ MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, mv_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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#ifdef CONFIG_PCI
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module_param(msi, int, 0444);
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MODULE_PARM_DESC(msi, "Enable use of PCI MSI (0=off, 1=on)");
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#endif
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module_init(mv_init);
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module_exit(mv_exit);
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