From 857d4aadc31e2fed9b0c3dd0731c1600a8384123 Mon Sep 17 00:00:00 2001 From: Rohit Vaswani Date: Fri, 29 Aug 2014 08:56:22 -0700 Subject: [PATCH] lib: iomap: Add MSM RTB support The ioread* and the iowrite* functions and not inlined and hence the RTB logs end up containing the ioread and iowrite functions themselves and not the ones invoking them. Add RTB support to the ioread*and iowrite* functions so that we can get meaningful RTB logs. Note that to avoid multiple RTB logs for ioread* and iowrite* functions, read*_no_log and write*_no_log macros are added. Change-Id: I2315d44c4dfbeee6be4a52f21bf4a20dd9508597 Signed-off-by: Rohit Vaswani Signed-off-by: David Keitel --- arch/arm64/include/asm/io.h | 20 +++++++++++++++++++- lib/iomap.c | 23 +++++++++++++++++------ 2 files changed, 36 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index af926ab647ad..3a7dbd74f278 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -143,8 +143,16 @@ static inline u64 __raw_readq_no_log(const volatile void __iomem *addr) #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) +#define readb_relaxed_no_log(c) ({ u8 __v = __raw_readb_no_log(c); __v; }) +#define readw_relaxed_no_log(c) ({ u16 __v = le16_to_cpu((__force __le16)__raw_readw_no_log(c)); __v; }) #define readl_relaxed_no_log(c) ({ u32 __v = le32_to_cpu((__force __le32)__raw_readl_no_log(c)); __v; }) -#define writel_relaxed_no_log(v,c) ((void)__raw_writel_no_log((__force u32)cpu_to_le32(v),(c))) +#define readq_relaxed_no_log(c) ({ u64 __v = le64_to_cpu((__force __le64)__raw_readq_no_log(c)); __v; }) + +#define writeb_relaxed_no_log(v, c) ((void)__raw_writeb_no_log((v), (c))) +#define writew_relaxed_no_log(v, c) ((void)__raw_writew_no_log((__force u16)cpu_to_le32(v), (c))) +#define writel_relaxed_no_log(v, c) ((void)__raw_writel_no_log((__force u32)cpu_to_le32(v), (c))) +#define writeq_relaxed_no_log(v, c) ((void)__raw_writeq_no_log((__force u64)cpu_to_le32(v), (c))) + /* * I/O memory access primitives. Reads are ordered relative to any * following Normal memory access. Writes are ordered relative to any prior @@ -160,6 +168,16 @@ static inline u64 __raw_readq_no_log(const volatile void __iomem *addr) #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); }) +#define readb_no_log(c) ({ u8 __v = readb_relaxed_no_log(c); __iormb(); __v; }) +#define readw_no_log(c) ({ u16 __v = readw_relaxed_no_log(c); __iormb(); __v; }) +#define readl_no_log(c) ({ u32 __v = readl_relaxed_no_log(c); __iormb(); __v; }) +#define readq_no_log(c) ({ u64 __v = readq_relaxed_no_log(c); __iormb(); __v; }) + +#define writeb_no_log(v, c) ({ __iowmb(); writeb_relaxed_no_log((v), (c)); }) +#define writew_no_log(v, c) ({ __iowmb(); writew_relaxed_no_log((v), (c)); }) +#define writel_no_log(v, c) ({ __iowmb(); writel_relaxed_no_log((v), (c)); }) +#define writeq_no_log(v, c) ({ __iowmb(); writeq_relaxed_no_log((v), (c)); }) + /* * A typesafe __io() helper */ diff --git a/lib/iomap.c b/lib/iomap.c index fc3dcb4b238e..b29a91e63f01 100644 --- a/lib/iomap.c +++ b/lib/iomap.c @@ -5,6 +5,7 @@ */ #include #include +#include #include @@ -70,26 +71,31 @@ static void bad_io_access(unsigned long port, const char *access) unsigned int ioread8(void __iomem *addr) { - IO_COND(addr, return inb(port), return readb(addr)); + uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); + IO_COND(addr, return inb(port), return readb_no_log(addr)); return 0xff; } unsigned int ioread16(void __iomem *addr) { - IO_COND(addr, return inw(port), return readw(addr)); + uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); + IO_COND(addr, return inw(port), return readw_no_log(addr)); return 0xffff; } unsigned int ioread16be(void __iomem *addr) { + uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr)); return 0xffff; } unsigned int ioread32(void __iomem *addr) { - IO_COND(addr, return inl(port), return readl(addr)); + uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); + IO_COND(addr, return inl(port), return readl_no_log(addr)); return 0xffffffff; } unsigned int ioread32be(void __iomem *addr) { + uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr)); return 0xffffffff; } @@ -111,22 +117,27 @@ EXPORT_SYMBOL(ioread32be); void iowrite8(u8 val, void __iomem *addr) { - IO_COND(addr, outb(val,port), writeb(val, addr)); + uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); + IO_COND(addr, outb(val, port), writeb_no_log(val, addr)); } void iowrite16(u16 val, void __iomem *addr) { - IO_COND(addr, outw(val,port), writew(val, addr)); + uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); + IO_COND(addr, outw(val, port), writew_no_log(val, addr)); } void iowrite16be(u16 val, void __iomem *addr) { + uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr)); } void iowrite32(u32 val, void __iomem *addr) { - IO_COND(addr, outl(val,port), writel(val, addr)); + uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); + IO_COND(addr, outl(val, port), writel_no_log(val, addr)); } void iowrite32be(u32 val, void __iomem *addr) { + uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr)); } EXPORT_SYMBOL(iowrite8);