From 8a5747dc958f375104e282e6bb728841648285dc Mon Sep 17 00:00:00 2001 From: Rohit Vaswani Date: Wed, 7 May 2014 09:56:58 -0700 Subject: [PATCH] msm: bbif-fsm9900: Add ADC and PRI clock rate change Add ADC Clock rate change between 326.4 and 345.6 MHz. PRI rate to half these frequencies. Change-Id: I17b58e9aebc0c363a5f24b579639f4b4c30b4c26 Acked-by: Edward Rodrigues Signed-off-by: Rohit Vaswani --- arch/arm/mach-msm/bbif-fsm9900.c | 24 ++++++++++++++++++++++++ include/linux/fsm_rfic.h | 5 +++++ 2 files changed, 29 insertions(+) diff --git a/arch/arm/mach-msm/bbif-fsm9900.c b/arch/arm/mach-msm/bbif-fsm9900.c index 20ca0143b008..42d2a8af9921 100644 --- a/arch/arm/mach-msm/bbif-fsm9900.c +++ b/arch/arm/mach-msm/bbif-fsm9900.c @@ -26,6 +26,7 @@ #include #include #include +#include #include @@ -281,6 +282,29 @@ static long bbif_ioctl(struct file *file, } break; + case BBIF_IOCTL_SET_ADC_CLK: + { + unsigned int rate; + + if (copy_from_user(&rate, argp, sizeof(unsigned int))) { + pr_err("%s: Invalid rate %d\n", __func__, rate); + return -EFAULT; + } + + switch (rate) { + case 1: + mpll10_326_clk_init(); + break; + case 2: + mpll10_345_clk_init(); + break; + default: + pr_err("%s: Unknown ADC RATE\n", __func__); + break; + } + } + break; + default: pr_err("%s: Invalid IOCTL\n", __func__); return -EINVAL; diff --git a/include/linux/fsm_rfic.h b/include/linux/fsm_rfic.h index 02c6759a7155..0948297181af 100644 --- a/include/linux/fsm_rfic.h +++ b/include/linux/fsm_rfic.h @@ -20,6 +20,8 @@ void fsm9900_gluon_init(void); void fsm9900_rfic_init(void); void fsm9900_mtr_init(void); +void mpll10_326_clk_init(void); +void mpll10_345_clk_init(void); /* * Device interface @@ -149,6 +151,9 @@ struct rfic_wfm_param { #define BBIF_IOCTL_SET_ADC_BW \ _IOC(_IOC_WRITE, RFIC_IOCTL_MAGIC, 0x43, \ sizeof(struct bbif_bw_param *)) +#define BBIF_IOCTL_SET_ADC_CLK \ + _IOC(_IOC_WRITE, RFIC_IOCTL_MAGIC, 0x44, \ + sizeof(unsigned int *)) #define RFIC_IOCTL_SET_LDO \ _IOC(_IOC_WRITE, RFIC_IOCTL_MAGIC, 0x50, \ sizeof(unsigned int *))