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USB: dwc3: Add workaround for incorrect GUSB3PIPECTL default value

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GUSB3PIPECTL[22] bit is for enabling/disabling receiver detection in
either U3 or Rx.Detect states.  It should be '0' by default to enable
receiver detection.  But it is overridden with '1' on cores revision <
2.30a.  Fix this in software.

CRs-Fixed: 377848
Change-Id: I9500f687f386330ed3c686f46365c08b8c8b0d28
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
This commit is contained in:
Pavankumar Kondeti 2012-07-16 11:44:46 +05:30 committed by Stephen Boyd
parent 2efbf2432d
commit 93e7994006
2 changed files with 6 additions and 0 deletions
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5
drivers/usb/dwc3/core.c
View file

@ -385,6 +385,11 @@ static int dwc3_core_init(struct dwc3 *dwc)
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
reg &= ~DWC3_GUSB3PIPECTL_DELAY_P1P2P3;
reg |= 1 << __ffs(DWC3_GUSB3PIPECTL_DELAY_P1P2P3);
/*
* Receiver Detection in U3/Rx.Det is mistakenly disabled in
* cores < 2.30a. Fix it here.
*/
reg &= ~DWC3_GUSB3PIPECTL_DIS_RXDET_U3_RXDET;
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
}

1
drivers/usb/dwc3/core.h
View file

@ -193,6 +193,7 @@
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
#define DWC3_GUSB3PIPECTL_DELAY_P1P2P3 (7 << 19)
#define DWC3_GUSB3PIPECTL_DIS_RXDET_U3_RXDET (1 << 22)
/* Global TX Fifo Size Register */
#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff)