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[PATCH] ppc64: Fix wrong register mapping in mpic driver

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The mpic interrupt controller driver (used on G5 and early pSeries among
others) has a bug where it doesn't get the right virtual address for the
timer registers.  It causes the driver to poke at the MMIO space of
whatever has been mapped just next to it (ouch !) when initializing and
causes boot failures on some IBM machines.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Benjamin Herrenschmidt 2005-10-26 01:59:00 -07:00 committed by Linus Torvalds
parent 1c6fe94659
commit 958d24df82
1 changed files with 2 additions and 2 deletions
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4
arch/ppc64/kernel/mpic.c
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@ -506,8 +506,8 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr,
mpic->senses_count = senses_count;
/* Map the global registers */
mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000);
mpic->tmregs = mpic->gregs + (MPIC_TIMER_BASE >> 2);
mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x2000);
mpic->tmregs = mpic->gregs + ((MPIC_TIMER_BASE - MPIC_GREG_BASE) >> 2);
BUG_ON(mpic->gregs == NULL);
/* Reset */