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Merge "ARM: dts: msm: add i2c controller device for zirc"

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Linux Build Service Account 2014-07-08 16:08:19 -07:00 committed by Gerrit - the friendly Code Review server
parent b1c9709057 74072eff70
commit 95b6c25e76
2 changed files with 44 additions and 0 deletions
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18
arch/arm/boot/dts/qcom/msmzirc-pinctrl.dtsi
View File

@ -550,5 +550,23 @@
bias-disable;
};
};
pmx_i2c_2 {
/* CLK, DATA */
qcom,pins = <&gp 6>, <&gp 7>;
qcom,num-grp-pins = <2>;
qcom,pin-func = <3>;
label = "pmx_i2c_2";
i2c_2_active: i2c_2_active {
drive-strength = <2>; /* 2 MA */
bias-disable = <0>; /* No PULL */
};
i2c_2_sleep: i2c_2_sleep {
drive-strength = <2>; /* 2 MA */
bias-disable = <0>; /* No PULL */
};
};
};
};

26
arch/arm/boot/dts/qcom/msmzirc.dtsi
View File

@ -28,6 +28,7 @@
smd36 = &smdtty_loopback;
spi0 = &spi_0;
spi1 = &spi_1;
i2c2 = &i2c_2;
};
memory {
@ -275,6 +276,31 @@
status = "disabled";
};
i2c_2: i2c@78b6000 { /* BLSP1 QUP2 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "qup_phys_addr", "bam_phys_addr";
reg = <0x78b6000 0x1000>,
<0x7884000 0x23000>;
interrupt-names = "qup_irq", "bam_irq";
interrupts = <0 96 0>, <0 238 0>;
qcom,clk-freq-out = <100000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
<&clock_gcc clk_gcc_blsp1_qup2_i2c_apps_clk>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_2_active>;
pinctrl-1 = <&i2c_2_sleep>;
qcom,noise-rjct-scl = <0>;
qcom,noise-rjct-sda = <0>;
qcom,bam-pipe-idx-cons = <6>;
qcom,bam-pipe-idx-prod = <7>;
qcom,master-id = <86>;
};
spmi_bus: qcom,spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x200f000 0x1000>,