coresight: enable SD only mode when hardware sensing is not enabled
cd_gpio is floating on some devices, then there is a possiblity that a false CARD_DETECT toggle is created when software starts to resume SD card from power collapse at the same time. SD driver resume will fail due to collision. Change-Id: I5b33da09fe8d71ea2fa381f98f1dd79286d28399 Signed-off-by: Xiaogang Cui <xiaogang@codeaurora.org>
This commit is contained in:
parent
50b0bc345f
commit
9ac709e17d
|
@ -35,8 +35,8 @@
|
|||
#define nidnt_readl(drvdata, off) __raw_readl(drvdata->base + off)
|
||||
|
||||
#define NIDNT_MAX_PINS 6
|
||||
#define NIDNT_BOOT_FROM_SD 0
|
||||
#define NIDNT_SDCARD_ONLY 1
|
||||
#define NIDNT_BOOT_FROM_SD BIT(0)
|
||||
#define NIDNT_SDCARD_ONLY BIT(1)
|
||||
#define NIDNT_CARD_DETECT_GPIO_POLARITY BIT(8)
|
||||
#define NIDNT_CARD_DETECT_GPIO_SHIFT 0
|
||||
#define NIDNT_DEBOUNCE_MASK 0xfffff000UL
|
||||
|
@ -315,9 +315,9 @@ static bool coresight_nidnt_is_boot_from_sd(struct nidnt_drvdata *nidnt_drvdata)
|
|||
pr_info("nidnt boot config: %x\n",
|
||||
(unsigned int)nidnt_boot_config);
|
||||
|
||||
if (BVAL(nidnt_boot_config, NIDNT_BOOT_FROM_SD))
|
||||
if (nidnt_boot_config & NIDNT_BOOT_FROM_SD)
|
||||
ret = true;
|
||||
else if (BVAL(nidnt_boot_config, NIDNT_SDCARD_ONLY))
|
||||
else if (nidnt_boot_config & NIDNT_SDCARD_ONLY)
|
||||
ret = true;
|
||||
else
|
||||
ret = false;
|
||||
|
@ -328,6 +328,23 @@ static bool coresight_nidnt_is_boot_from_sd(struct nidnt_drvdata *nidnt_drvdata)
|
|||
return ret;
|
||||
}
|
||||
|
||||
int coresight_nidnt_config_qdsd_enable(bool enable)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
if (!nidnt_drvdata)
|
||||
return -EINVAL;
|
||||
|
||||
val = nidnt_readl(nidnt_drvdata, TLMM_QDSD_BOOT_CTL);
|
||||
if (enable)
|
||||
val &= ~NIDNT_SDCARD_ONLY;
|
||||
else
|
||||
val |= NIDNT_SDCARD_ONLY;
|
||||
nidnt_writel(nidnt_drvdata, val, TLMM_QDSD_BOOT_CTL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int coresight_nidnt_parse_pinctrl_info(struct device *dev,
|
||||
struct nidnt_drvdata *
|
||||
nidnt_drvdata)
|
||||
|
|
|
@ -27,6 +27,7 @@ extern void coresight_nidnt_writel(unsigned int val, unsigned int off);
|
|||
|
||||
extern int coresight_nidnt_config_swoverride(enum nidnt_debug_mode mode);
|
||||
|
||||
extern int coresight_nidnt_config_qdsd_enable(bool enable);
|
||||
extern void coresight_nidnt_set_hwdetect_param(bool val);
|
||||
|
||||
extern ssize_t coresight_nidnt_show_timeout_value(struct device *dev,
|
||||
|
@ -57,6 +58,11 @@ static inline int coresight_nidnt_config_swoverride(enum nidnt_debug_mode mode)
|
|||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int coresight_nidnt_config_qdsd_enable(bool enable)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline void coresight_nidnt_set_hwdetect_param(bool val) {}
|
||||
|
||||
static inline ssize_t coresight_nidnt_show_timeout_value(struct device *dev,
|
||||
|
|
|
@ -314,6 +314,9 @@ static int __tpiu_enable_to_sdc_trace(struct tpiu_drvdata *drvdata)
|
|||
__tpiu_enable(drvdata, 0x8, 0x103);
|
||||
|
||||
if (drvdata->nidnthw) {
|
||||
ret = coresight_nidnt_config_qdsd_enable(true);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = coresight_nidnt_config_swoverride(NIDNT_MODE_SDC_TRACE);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
@ -352,6 +355,10 @@ static int __tpiu_enable_to_sdc_swduart(struct tpiu_drvdata *drvdata)
|
|||
__tpiu_enable(drvdata, 0x8, 0x103);
|
||||
|
||||
if (drvdata->nidnthw) {
|
||||
ret = coresight_nidnt_config_qdsd_enable(true);
|
||||
if (ret)
|
||||
goto err1;
|
||||
|
||||
ret = coresight_nidnt_config_swoverride(NIDNT_MODE_SDC_SWDUART);
|
||||
if (ret)
|
||||
goto err1;
|
||||
|
@ -394,6 +401,10 @@ static int __tpiu_enable_to_sdc_swdtrc(struct tpiu_drvdata *drvdata)
|
|||
__tpiu_enable(drvdata, 0x2, 0x103);
|
||||
|
||||
if (drvdata->nidnthw) {
|
||||
ret = coresight_nidnt_config_qdsd_enable(true);
|
||||
if (ret)
|
||||
goto err1;
|
||||
|
||||
ret = coresight_nidnt_config_swoverride(NIDNT_MODE_SDC_SWDTRC);
|
||||
if (ret)
|
||||
goto err1;
|
||||
|
@ -420,9 +431,17 @@ static int __tpiu_enable_to_sdc_jtag(struct tpiu_drvdata *drvdata)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = coresight_nidnt_config_qdsd_enable(true);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = coresight_nidnt_config_swoverride(NIDNT_MODE_SDC_JTAG);
|
||||
if (ret)
|
||||
__tpiu_disable_to_sdc(drvdata);
|
||||
goto err;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
__tpiu_disable_to_sdc(drvdata);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -434,9 +453,17 @@ static int __tpiu_enable_to_sdc_spmi(struct tpiu_drvdata *drvdata)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = coresight_nidnt_config_qdsd_enable(true);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = coresight_nidnt_config_swoverride(NIDNT_MODE_SDC_SPMI);
|
||||
if (ret)
|
||||
__tpiu_disable_to_sdc(drvdata);
|
||||
goto err;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
__tpiu_disable_to_sdc(drvdata);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -989,14 +1016,25 @@ static int tpiu_parse_of_data(struct platform_device *pdev,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (drvdata->nidnthw && nidnt_boot_hw_detect) {
|
||||
ret = __tpiu_enable_to_sdc(drvdata);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (drvdata->nidnthw) {
|
||||
if (nidnt_boot_hw_detect) {
|
||||
ret = __tpiu_enable_to_sdc(drvdata);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* enable and configure nidnt hardware detect */
|
||||
coresight_nidnt_set_hwdetect_param(true);
|
||||
coresight_nidnt_enable_hwdetect();
|
||||
/* enable and configure nidnt hardware detect */
|
||||
coresight_nidnt_set_hwdetect_param(true);
|
||||
coresight_nidnt_enable_hwdetect();
|
||||
dev_info(dev, "NIDnT run-time PS enabled\n");
|
||||
} else {
|
||||
/* if hardware detect is disabled, disable QDSD */
|
||||
ret = coresight_nidnt_config_qdsd_enable(false);
|
||||
if (ret) {
|
||||
dev_err(drvdata->dev, "failed to disable QDSD\n");
|
||||
return ret;
|
||||
}
|
||||
dev_info(dev, "NIDnT on SDCARD only mode\n");
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue