crypto: msm: Fix failure on XTS mode

XTs mode of operation fails with a crash or hangs in some cases.
This failure is due to numerous reason:
- CRYPTO_XTS_DU_SIZE address is incorrect resulting
  in not setting the register correctly
- xts_du_size command list pointer was NULL. This results in
  the operation crashing due to dereferenciong of a NULL pointer
- XTS KEY register was not set correctly, resulting in
  incorrect results for encrypt/decrypt operation

After fixing the above XTS mode of operation is passing.

Change-Id: I1cfcfaf0ecae61510d3d4372c49a412d65d7bc40
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>

drivers/crypto/msm/qce50.c

@@ -382,7 +382,7 @@ static int _ce_get_cipher_cmdlistinfo(struct qce_device *pce_dev,
 			break;
 
 		case QCE_MODE_XTS:
-			if (creq->encklen ==  AES128_KEY_SIZE)
+			if (creq->encklen/2 ==  AES128_KEY_SIZE)
 				*cmdlistinfo = &cmdlistptr->cipher_aes_128_xts;
 			else
 				*cmdlistinfo = &cmdlistptr->cipher_aes_256_xts;
@@ -1471,10 +1471,11 @@ static int _setup_cipher_aes_cmdlistptrs(struct qce_device *pdev,
 					0, &pcl_info->encr_xts_key);
 		for (i = 1; i < xts_key_reg; i++)
 			qce_add_cmd_element(pdev, &ce_vaddr,
-				(CRYPTO_ENCR_KEY0_REG + i * sizeof(uint32_t)),
-				0, NULL);
+				(CRYPTO_ENCR_XTS_KEY0_REG +
+						i * sizeof(uint32_t)), 0, NULL);
 		qce_add_cmd_element(pdev, &ce_vaddr,
-				CRYPTO_ENCR_XTS_DU_SIZE_REG, 0, NULL);
+				CRYPTO_ENCR_XTS_DU_SIZE_REG, 0,
+					&pcl_info->encr_xts_du_size);
 	}
 	if (iv_reg) {
 		qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CNTR0_IV0_REG, 0,

drivers/crypto/msm/qcryptohw_50.h

@@ -144,7 +144,7 @@
 #define CRYPTO_ENCR_CCM_INT_CNTR2_REG		0x1A228
 #define CRYPTO_ENCR_CCM_INT_CNTR3_REG		0x1A22C
 
-#define CRYPTO_ENCR_XTS_DU_SIZE_REG		0xA1230
+#define CRYPTO_ENCR_XTS_DU_SIZE_REG		0x1A230
 
 #define CRYPTO_AUTH_SEG_CFG_REG			0x1A300
 #define CRYPTO_AUTH_SEG_SIZE_REG		0x1A304