msm: pcie: correct the shadow save for RC L1 register

When reading shadow registers, the wrong value is being
recovered for root complex L1 register. Currently,
the value being recovered is a shadow of the endpoint's
L1 register. This change will recover the correct shadow
value for RC L1 register.

Change-Id: I82b1810ef8761de90b350743cdd9b24a74efb62f
Signed-off-by: Tony Truong <truong@codeaurora.org>
This commit is contained in:
Tony Truong 2015-02-26 17:01:51 -08:00
parent 280d580297
commit a5b467db38
1 changed files with 1 additions and 1 deletions

View File

@ -2851,7 +2851,7 @@ static void msm_pcie_config_link_state(struct msm_pcie_dev_t *dev)
0, BIT(1));
if (dev->shadow_en) {
dev->rc_shadow[PCIE20_CAP_LINKCTRLSTATUS / 4] =
readl_relaxed(dev->conf +
readl_relaxed(dev->dm_core +
PCIE20_CAP_LINKCTRLSTATUS);
dev->ep_shadow[0][ep_link_ctrlstts_offset / 4] =
readl_relaxed(dev->conf +