From ac9cbc4bfa1a5b6c528c9adb432ab17bbf24194f Mon Sep 17 00:00:00 2001 From: Sudheer Papothi Date: Thu, 3 Sep 2015 15:54:58 +0530 Subject: [PATCH] ASoC: wcd9335: Update SIDO buck register sequence for WCD9335 v2.0 Set current(IRef) and voltage(VRef) references to external and use supply from RCO (RC Oscillator) bandgap. Change-Id: I9c0d608011e20670aafaa343d7c11c17129b5704 Signed-off-by: Sudheer Papothi --- sound/soc/codecs/wcd9335.c | 19 +++++++++++++++++++ sound/soc/codecs/wcd9xxx-resmgr-v2.c | 19 +++++++++++++------ sound/soc/codecs/wcd9xxx-resmgr-v2.h | 6 ++++++ 3 files changed, 38 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c index 481b7a6bd336..b7bd92b6d931 100644 --- a/sound/soc/codecs/wcd9335.c +++ b/sound/soc/codecs/wcd9335.c @@ -660,6 +660,20 @@ struct tasha_priv { static enum codec_variant codec_ver; +static void tasha_enable_sido_buck(struct snd_soc_codec *codec) +{ + struct tasha_priv *tasha = snd_soc_codec_get_drvdata(codec); + + snd_soc_update_bits(codec, WCD9335_ANA_RCO, 0x80, 0x80); + snd_soc_update_bits(codec, WCD9335_ANA_BUCK_CTL, 0x02, 0x02); + /* 100us sleep needed after IREF settings */ + usleep_range(100, 110); + snd_soc_update_bits(codec, WCD9335_ANA_BUCK_CTL, 0x04, 0x04); + /* 100us sleep needed after VREF settings */ + usleep_range(100, 110); + tasha->resmgr->sido_input_src = SIDO_SOURCE_RCO_BG; +} + int tasha_enable_efuse_sensing(struct snd_soc_codec *codec) { struct tasha_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -679,6 +693,9 @@ int tasha_enable_efuse_sensing(struct snd_soc_codec *codec) if (!(snd_soc_read(codec, WCD9335_CHIP_TIER_CTRL_EFUSE_STATUS) & 0x01)) WARN(1, "%s: Efuse sense is not complete\n", __func__); + if (TASHA_IS_2_0(priv->wcd9xxx->version)) + tasha_enable_sido_buck(codec); + tasha_cdc_mclk_enable(codec, false, false); return 0; @@ -9871,6 +9888,8 @@ static int tasha_codec_probe(struct snd_soc_codec *codec) 0x03, 0x01); tasha_codec_init_reg(codec); + tasha_enable_efuse_sensing(codec); + pdata = dev_get_platdata(codec->dev->parent); ret = tasha_handle_pdata(tasha, pdata); if (IS_ERR_VALUE(ret)) { diff --git a/sound/soc/codecs/wcd9xxx-resmgr-v2.c b/sound/soc/codecs/wcd9xxx-resmgr-v2.c index e4356b4a1a4c..7dca58cfa4fd 100644 --- a/sound/soc/codecs/wcd9xxx-resmgr-v2.c +++ b/sound/soc/codecs/wcd9xxx-resmgr-v2.c @@ -264,8 +264,10 @@ static int wcd_resmgr_enable_clk_rco(struct wcd9xxx_resmgr_v2 *resmgr) } else if ((resmgr->clk_rco_users == 1) && (resmgr->clk_mclk_users)) { /* RCO Enable */ - wcd_resmgr_codec_reg_update_bits(resmgr, WCD9335_ANA_RCO, - 0x80, 0x80); + if (resmgr->sido_input_src == SIDO_SOURCE_INTERNAL) + wcd_resmgr_codec_reg_update_bits(resmgr, + WCD9335_ANA_RCO, + 0x80, 0x80); /* * 20us required after RCO BG is enabled as per HW * requirements @@ -318,16 +320,20 @@ static int wcd_resmgr_disable_clk_rco(struct wcd9xxx_resmgr_v2 *resmgr) 0x04, 0x00); wcd_resmgr_codec_reg_update_bits(resmgr, WCD9335_ANA_RCO, 0x40, 0x00); - wcd_resmgr_codec_reg_update_bits(resmgr, WCD9335_ANA_RCO, - 0x80, 0x00); + if (resmgr->sido_input_src == SIDO_SOURCE_INTERNAL) + wcd_resmgr_codec_reg_update_bits(resmgr, + WCD9335_ANA_RCO, + 0x80, 0x00); resmgr->clk_type = WCD_CLK_OFF; } else if ((resmgr->clk_rco_users == 0) && (resmgr->clk_mclk_users)) { /* Disable RCO while MCLK is ON */ wcd_resmgr_codec_reg_update_bits(resmgr, WCD9335_ANA_RCO, 0x40, 0x00); - wcd_resmgr_codec_reg_update_bits(resmgr, WCD9335_ANA_RCO, - 0x80, 0x00); + if (resmgr->sido_input_src == SIDO_SOURCE_INTERNAL) + wcd_resmgr_codec_reg_update_bits(resmgr, + WCD9335_ANA_RCO, + 0x80, 0x00); } pr_debug("%s: rco clk users: %d, clk_type: %s\n", __func__, resmgr->clk_rco_users, @@ -424,6 +430,7 @@ struct wcd9xxx_resmgr_v2 *wcd_resmgr_init( resmgr->master_bias_users = 0; resmgr->codec = codec; resmgr->core_res = core_res; + resmgr->sido_input_src = SIDO_SOURCE_INTERNAL; return resmgr; } diff --git a/sound/soc/codecs/wcd9xxx-resmgr-v2.h b/sound/soc/codecs/wcd9xxx-resmgr-v2.h index 521c926f4cfb..5f44e6fdefbf 100644 --- a/sound/soc/codecs/wcd9xxx-resmgr-v2.h +++ b/sound/soc/codecs/wcd9xxx-resmgr-v2.h @@ -22,6 +22,11 @@ enum wcd_clock_type { WCD_CLK_MCLK, }; +enum { + SIDO_SOURCE_INTERNAL, + SIDO_SOURCE_RCO_BG, +}; + struct wcd_resmgr_cb { int (*cdc_rco_ctrl)(struct snd_soc_codec *, bool); }; @@ -40,6 +45,7 @@ struct wcd9xxx_resmgr_v2 { enum wcd_clock_type clk_type; const struct wcd_resmgr_cb *resmgr_cb; + int sido_input_src; }; #define WCD9XXX_V2_BG_CLK_LOCK(resmgr) \