tspp2: Add support for clocks and power regulator

Add support to enable and disable the power regulator and
relevant clocks that the TSPP2 HW unit requires.

Change-Id: I29cbb9df6267c44f94bfeef6558e206b2b162248
Signed-off-by: Liron Kuch <lkuch@codeaurora.org>

Documentation/arm/msm/tspp2.txt

@@ -172,6 +172,9 @@ struct tspp2_operation raw_op;
 struct sps_event_notify event;
 struct sps_iovec desc;
 
+/* Open TSPP2 device for use */
+tspp2_device_open(dev_id);
+
 /* Set global configuration */
 tspp2_config_set(dev_id, &cfg);
 
@@ -240,6 +243,7 @@ tspp2_filter_close(filter_handle);
 tspp2_src_pipe_detach(src_handle, pipe_handle);
 tspp2_pipe_close(pipe_handle);
 tspp2_src_close(src_handle);
+tspp2_device_close(dev_id);
 
 Debug facilities
 ----------------
@@ -298,6 +302,13 @@ Kernel-space API
 
 Control path API
 -------------------
+
+TSPP2 device open / close API:
+------------------------------
+int tspp2_device_open(u32 dev_id);
+
+int tspp2_device_close(u32 dev_id);
+
 Global configuration for the TSPP2 device:
 ------------------------------------------
 int tspp2_config_set(u32 dev_id, const struct tspp2_config *cfg);

Documentation/devicetree/bindings/arm/msm/msm_tspp2.txt

@@ -17,14 +17,22 @@ Required properties:
 - interrupts: represents IRQ numbers for the following:
 	TSIF_TSPP2, TSIF0, TSIF1, TSIF_BAM.
 - interrupt-names: TSPP2, TSIF and BAM interrupt names.
+- vdd-supply: power regulator (GDSC) supplying power to the broadcast subsystem.
 - qcom,tspp2-ahb-clk: TSPP2 AHB clock name.
 - qcom,tspp2-core-clk: TSPP2 core clock name.
+- qcom,tspp2-vbif-clk: TSPP2 VBIF clock name.
+- qcom,tspp2-klm-ahb-clk: TSPP2 key ladder AHB clock name.
 - qcom,tsif-ref-clk: TSIF reference clock name.
 	The driver uses clk_get to get the clocks by name. The clocks
 	should be defined in the relevant clock file (e.g. clock-8092.c).
-/* TODO: may need to add Key Ladder (KLM) clock too */
+Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt"
-/* TODO: update regarding regulator (GDSC): */
+for more information on the following four properties:
-/* TODO: update regarding bus bandwidth voting: */
+- qcom,msm-bus,name: String representing the client name ("tspp2").
+- qcom,msm-bus,num-cases: 3 cases - no bandwidth, minimal bandwidth for register
+	access, and maximum bandwidth required for full operation.
+- qcom,msm-bus,num-paths
+- qcom,msm-bus,vectors-KBps: represents the bandwidths required for the above
+	usecases.
 - qcom,iommu-hlos-group: Name of the Broadcast HLOS IOMMU domain as defined in
 	<target>-iommu-domains.dtsi, (e.g. mpq8092-iommu-domains.dtsi).
 	The Broadcast HLOS IOMMU domain includes a context bank and virtual
@@ -58,9 +66,19 @@ Example (for MPQ8092 platform, avaialble at mpq8092.dtsi):
 			"TSIF0",
 			"TSIF1",
 			"TSPP2_BAM";
+		vdd-supply = <&gdsc_bcss>;
 		qcom,tspp2-ahb-clk = "bcc_tspp2_ahb_clk";
 		qcom,tspp2-core-clk = "bcc_tspp2_core_clk";
-		qcom,tsif-ref-clk = "tsif_ref_clk_src";
+		qcom,tspp2-vbif-clk = "bcc_vbif_tspp2_clk";
+		qcom,tspp2-klm-ahb-clk = "bcc_klm_ahb_clk";
+		qcom,tsif-ref-clk = "gcc_tsif_ref_clk";
+		qcom,msm-bus,name = "tspp2";
+		qcom,msm-bus,num-cases = <3>;
+		qcom,msm-bus,num-paths = <1>;
+		qcom,msm-bus,vectors-KBps =
+				<96 512 0 0>, /* No vote */
+				<96 512 1024 1024>, /* Register access only. 8Mbps should be more than enough */
+				<96 512 24576 61440>; /* Max. bandwidth required is 480Mbps */
 		qcom,iommu-hlos-group = "bcast_hlos";
 		qcom,iommu-hlos-partition = <0>;
 		qcom,iommu-cpz-group = "bcast_cpz";

arch/arm/boot/dts/mpq8092.dtsi

@@ -387,9 +387,19 @@
 			"TSIF0",
 			"TSIF1",
 			"TSPP2_BAM";
+		vdd-supply = <&gdsc_bcss>;
 		qcom,tspp2-ahb-clk = "bcc_tspp2_ahb_clk";
 		qcom,tspp2-core-clk = "bcc_tspp2_core_clk";
-		qcom,tsif-ref-clk = "tsif_ref_clk_src";
+		qcom,tspp2-vbif-clk = "bcc_vbif_tspp2_clk";
+		qcom,tspp2-klm-ahb-clk = "bcc_klm_ahb_clk";
+		qcom,tsif-ref-clk = "gcc_tsif_ref_clk";
+		qcom,msm-bus,name = "tspp2";
+		qcom,msm-bus,num-cases = <3>;
+		qcom,msm-bus,num-paths = <1>;
+		qcom,msm-bus,vectors-KBps =
+				<96 512 0 0>, /* No vote */
+				<96 512 1024 1024>, /* Register access only. 8Mbps should be more than enough */
+				<96 512 24576 61440>; /* Max. bandwidth required is 480Mbps */
 		qcom,iommu-hlos-group = "bcast_hlos";
 		qcom,iommu-hlos-partition = <0>;
 		qcom,iommu-cpz-group = "bcast_cpz";

arch/arm/mach-msm/clock-8092.c

@@ -6399,6 +6399,8 @@ static struct clk_lookup mpq_clocks_8092[] = {
 	CLK_LOOKUP("",	gcc_bcss_cfg_ahb_clk.c,	""),
 	CLK_LOOKUP("",	gcc_bcss_sleep_clk.c,	""),
 	CLK_LOOKUP("",	gcc_tsif_ref_clk.c,	""),
+	CLK_LOOKUP("gcc_tsif_ref_clk",	gcc_tsif_ref_clk.c,
+					"fc724000.msm_tspp2"),
 
 	/* BLSP1 */
 	CLK_LOOKUP("iface_clk",	gcc_blsp1_ahb_clk.c,	"f991f000.serial"),
@@ -6711,14 +6713,22 @@ static struct clk_lookup mpq_clocks_8092[] = {
 	CLK_LOOKUP("",	bcc_tsc_par_clk.c,	""),
 	CLK_LOOKUP("",	bcc_tsc_ser_clk.c,	""),
 	CLK_LOOKUP("",	bcc_tspp2_core_clk.c,	""),
+	CLK_LOOKUP("bcc_tspp2_core_clk",	bcc_tspp2_core_clk.c,
+						"fc724000.msm_tspp2"),
 	CLK_LOOKUP("",	bcc_vbif_dem_core_clk.c,	""),
 	CLK_LOOKUP("",	bcc_vbif_tspp2_clk.c,	""),
+	CLK_LOOKUP("bcc_vbif_tspp2_clk",	bcc_vbif_tspp2_clk.c,
+						"fc724000.msm_tspp2"),
 	CLK_LOOKUP("",	bcc_img_ahb_clk.c,	""),
 	CLK_LOOKUP("",	bcc_klm_ahb_clk.c,	""),
+	CLK_LOOKUP("bcc_klm_ahb_clk",	bcc_klm_ahb_clk.c,
+					"fc724000.msm_tspp2"),
 	CLK_LOOKUP("",	bcc_lnb_ahb_clk.c,	""),
 	CLK_LOOKUP("",	bcc_dem_ahb_clk.c,	""),
 	CLK_LOOKUP("",	bcc_tsc_ahb_clk.c,	""),
 	CLK_LOOKUP("",	bcc_tspp2_ahb_clk.c,	""),
+	CLK_LOOKUP("bcc_tspp2_ahb_clk",	bcc_tspp2_ahb_clk.c,
+					"fc724000.msm_tspp2"),
 	CLK_LOOKUP("",	bcc_vbif_ahb_clk.c,	""),
 	CLK_LOOKUP("",	bcc_vbif_axi_clk.c,	""),
 	CLK_LOOKUP("",	bcc_lnb_ser_clk.c,	""),

arch/arm/mach-msm/include/mach/msm_tspp2.h

@@ -32,6 +32,8 @@
  *
  * @tspp2_ahb_clk:		TSPP2 device AHB clock name.
  * @tspp2_core_clk:		TSPP2 device core clock name.
+ * @tspp2_vbif_clk:		TSPP2 VBIF clock name.
+ * @tspp2_klm_ahb_clk:		TSPP2 key ladder AHB clock name.
  * @tsif_ref_clk:		TSIF device reference clock name.
  * @hlos_group:			IOMMU HLOS group name.
  * @cpz_group:			IOMMU CPZ group name.
@@ -41,6 +43,8 @@
 struct msm_tspp2_platform_data {
 	const char *tspp2_ahb_clk;
 	const char *tspp2_core_clk;
+	const char *tspp2_vbif_clk;
+	const char *tspp2_klm_ahb_clk;
 	const char *tsif_ref_clk;
 	const char *hlos_group;
 	const char *cpz_group;
@@ -612,6 +616,11 @@ struct tspp2_operation {
 	} params;
 };
 
+/* TSPP2 device open / close API */
+int tspp2_device_open(u32 dev_id);
+
+int tspp2_device_close(u32 dev_id);
+
 /* Global configuration API */
 int tspp2_config_set(u32 dev_id, const struct tspp2_config *cfg);