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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-11-07 04:09:21 +00:00
drivers/edac: fix edac_mc init apis
Refactoring of sysfs code necessitated the refactoring of the edac_mc_alloc() and edac_mc_add_mc() apis, of moving the index value to the alloc() function. This patch alters the in tree drivers to utilize this new api signature. Having the index value performed later created a chicken-and-the-egg issue. Moving it to the alloc() function allows for creating the necessary sysfs entries with the proper index number Cc: Alan Cox alan@lxorguk.ukuu.org.uk Signed-off-by: Doug Thompson <dougthompson@xmission.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
parent
fd309a9d8e
commit
b8f6f97552
12 changed files with 40 additions and 39 deletions
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@ -238,7 +238,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
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debugf0("%s()\n", __func__);
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pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems);
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ems_mode = (ems >> 10) & 0x3;
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mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS);
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mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS, 0);
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if (mci == NULL) {
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return -ENOMEM;
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@ -263,7 +263,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
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/* Here we assume that we will never see multiple instances of this
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* type of memory controller. The ID is therefore hardcoded to 0.
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*/
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail;
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}
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@ -977,7 +977,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
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/* Dual channel = 1, Single channel = 0 */
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drc_chan = dual_channel_active(ddrcsr);
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mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1);
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mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1, 0);
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if (mci == NULL) {
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return -ENOMEM;
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@ -1035,7 +1035,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
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/* Here we assume that we will never see multiple instances of this
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* type of memory controller. The ID is therefore hardcoded to 0.
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*/
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail;
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}
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@ -427,7 +427,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
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pci_read_config_dword(pdev, E7XXX_DRC, &drc);
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drc_chan = dual_channel_active(drc, dev_idx);
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mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
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mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1, 0);
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if (mci == NULL)
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return -ENOMEM;
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@ -478,7 +478,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
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/* Here we assume that we will never see multiple instances of this
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* type of memory controller. The ID is therefore hardcoded to 0.
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*/
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail1;
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}
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@ -765,8 +765,11 @@ static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
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#endif /* CONFIG_PCI */
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extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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unsigned nr_chans, int edac_index);
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extern int edac_mc_add_mc(struct mem_ctl_info *mci);
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extern void edac_mc_free(struct mem_ctl_info *mci);
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extern struct mem_ctl_info *edac_mc_find(int idx);
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extern int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx);
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extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev);
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extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
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unsigned long page);
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@ -803,33 +806,31 @@ extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, unsigned int csrow,
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/*
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* edac_device APIs
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*/
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extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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unsigned nr_chans);
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extern void edac_mc_free(struct mem_ctl_info *mci);
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extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev,
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int edac_idx);
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int dev_idx);
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extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
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extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
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int inst_nr, int block_nr, const char *msg);
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int inst_nr, int block_nr, const char *msg);
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extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
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int inst_nr, int block_nr, const char *msg);
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int inst_nr, int block_nr, const char *msg);
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/*
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* edac_pci APIs
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*/
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extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt, const char
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*edac_pci_name);
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extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
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const char *edac_pci_name);
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extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
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extern void
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edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci, unsigned long value);
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extern void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
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unsigned long value);
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extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
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extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
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extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev, const char
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*mod_name);
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extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
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struct device *dev,
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const char *mod_name);
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extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
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extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
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@ -129,7 +129,7 @@ void *edac_align_ptr(void *ptr, unsigned size)
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* struct mem_ctl_info pointer
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*/
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struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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unsigned nr_chans)
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unsigned nr_chans, int edac_index)
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{
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struct mem_ctl_info *mci;
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struct csrow_info *csi, *csrow;
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@ -159,7 +159,8 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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chi = (struct channel_info *)(((char *)mci) + ((unsigned long)chi));
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pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
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memset(mci, 0, size); /* clear all fields */
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/* setup index and various internal pointers */
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mci->mc_idx = edac_index;
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mci->csrows = csi;
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mci->pvt_info = pvt;
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mci->nr_csrows = nr_csrows;
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@ -405,10 +406,10 @@ EXPORT_SYMBOL(edac_mc_find);
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*/
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/* FIXME - should a warning be printed if no error detection? correction? */
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int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
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int edac_mc_add_mc(struct mem_ctl_info *mci)
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{
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debugf0("%s()\n", __func__);
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mci->mc_idx = mc_idx;
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#ifdef CONFIG_EDAC_DEBUG
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if (edac_debug_level >= 3)
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edac_mc_dump_mci(mci);
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@ -309,7 +309,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
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*/
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interleaved = i3000_is_interleaved(c0dra, c1dra, c0drb, c1drb);
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nr_channels = interleaved ? 2 : 1;
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mci = edac_mc_alloc(0, I3000_RANKS / nr_channels, nr_channels);
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mci = edac_mc_alloc(0, I3000_RANKS / nr_channels, nr_channels, 0);
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if (!mci)
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return -ENOMEM;
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@ -370,7 +370,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
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I3000_ERRSTS_BITS);
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rc = -ENODEV;
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("MC: %s(): failed edac_mc_add_mc()\n", __func__);
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goto fail;
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}
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@ -338,8 +338,6 @@ struct i5000_pvt {
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struct pci_dev *branch_0; /* 21.0 */
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struct pci_dev *branch_1; /* 22.0 */
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int node_id; /* ID of this node */
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u16 tolm; /* top of low memory */
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u64 ambase; /* AMB BAR */
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@ -1319,7 +1317,7 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
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__func__, num_channels, num_dimms_per_channel, num_csrows);
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/* allocate a new MC control structure */
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mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels);
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mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);
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if (mci == NULL)
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return -ENOMEM;
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@ -1366,7 +1364,7 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
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}
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/* add this new MC control structure to EDAC's list of MCs */
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if (edac_mc_add_mc(mci, pvt->node_id)) {
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if (edac_mc_add_mc(mci)) {
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debugf0("MC: " __FILE__
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": %s(): failed edac_mc_add_mc()\n", __func__);
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/* FIXME: perhaps some code should go here that disables error
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@ -239,7 +239,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
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if (pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg))
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return -EIO;
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mci = edac_mc_alloc(0, I82443BXGX_NR_CSROWS, I82443BXGX_NR_CHANS);
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mci = edac_mc_alloc(0, I82443BXGX_NR_CSROWS, I82443BXGX_NR_CHANS, 0);
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if (mci == NULL)
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return -ENOMEM;
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mci->edac_check = i82443bxgx_edacmc_check;
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mci->ctl_page_to_phys = NULL;
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail;
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}
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@ -186,7 +186,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
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the channel and the GRA registers map to physical devices so we are
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going to make 1 channel for group.
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*/
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mci = edac_mc_alloc(0, 16, 1);
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mci = edac_mc_alloc(0, 16, 1, 0);
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if (!mci)
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return -ENOMEM;
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/* Here we assume that we will never see multiple instances of this
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* type of memory controller. The ID is therefore hardcoded to 0.
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*/
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail;
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}
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@ -400,7 +400,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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drc = readl(ovrfl_window + I82875P_DRC);
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nr_chans = dual_channel_active(drc) + 1;
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mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
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nr_chans);
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nr_chans, 0);
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if (!mci) {
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rc = -ENOMEM;
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/* Here we assume that we will never see multiple instances of this
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* type of memory controller. The ID is therefore hardcoded to 0.
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*/
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail1;
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}
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@ -205,7 +205,8 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev,
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MCDEBUG_ERRCTL1_RFL_LOG_EN;
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pci_write_config_dword(pdev, MCDEBUG_ERRCTL1, errctl1);
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mci = edac_mc_alloc(0, PASEMI_EDAC_NR_CSROWS, PASEMI_EDAC_NR_CHANS);
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mci = edac_mc_alloc(0, PASEMI_EDAC_NR_CSROWS, PASEMI_EDAC_NR_CHANS,
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system_mmc_id++);
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if (mci == NULL)
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return -ENOMEM;
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*/
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pasemi_edac_get_error_info(mci);
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if (edac_mc_add_mc(mci, system_mmc_id++))
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if (edac_mc_add_mc(mci))
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goto fail;
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/* get this far and it's successful */
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@ -278,7 +278,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
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debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
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sdram_refresh_rate);
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debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
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mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS);
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mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS, 0);
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if (mci == NULL)
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return -ENOMEM;
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/* Here we assume that we will never see multiple instances of this
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* type of memory controller. The ID is therefore hardcoded to 0.
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*/
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if (edac_mc_add_mc(mci, 0)) {
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail;
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}
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