mmc: core: set REL_WR_SEC_C register to 0x1 per eMMC 5.0 spec

Some eMMC vendors violate eMMC 5.0 spec and set REL_WR_SEC_C
register to 0x10 to indicate the ability of RPMB throughput
improvement thus lead to failure when TZ module write data to
RPMB partition. This change will check bit[4] of EXT_CSD[166]
and if it is not set then change value of  REL_WR_SEC_C to 0x1
directly ignoring value of EXT_CSD[222].

CRs-Fixed: 866059
Change-Id: Ibd12c94ad691eca1fa3ea2049b750a6e98178678
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
This commit is contained in:
xiaonian 2015-07-16 14:39:32 +08:00 committed by Gerrit - the friendly Code Review server
parent 1345db4101
commit c2c3c78710
2 changed files with 13 additions and 0 deletions

View file

@ -537,6 +537,18 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd)
card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION];
/*
* Some eMMC vendors violate eMMC 5.0 spec and set
* REL_WR_SEC_C register to 0x10 to indicate the
* ability of RPMB throughput improvement thus lead
* to failure when TZ module write data to RPMB
* partition. So check bit[4] of EXT_CSD[166] and
* if it is not set then change value of REL_WR_SEC_C
* to 0x1 directly ignoring value of EXT_CSD[222].
*/
if (!(card->ext_csd.rel_param & EXT_CSD_WR_REL_PARAM_EN_RPMB))
card->ext_csd.rel_sectors = 0x1;
/*
* RPMB regions are defined in multiples of 128K.
*/

View file

@ -294,6 +294,7 @@ struct _mmc_csd {
#define EXT_CSD_BKOPS_EN_AUTO_EN BIT(1)
#define EXT_CSD_WR_REL_PARAM_EN (1<<2)
#define EXT_CSD_WR_REL_PARAM_EN_RPMB (1<<4)
#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)