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TSC: support new TSC HW unit
TSC (Transport Stream Controller) is a new HW unit designed to support two major functionalities: Mux: enable the routing of the MPEG transport streams from multiple sources to multiple destinations. CI: communication with the internal Conditional Access Module (CAM) over Common Interface (CI). The TSC driver supports the TSC HW unit, enabling the functionality it provides. Change-Id: I92e250fbd149644afbc65dd4dc6f92cca061a9a9 Signed-off-by: Anat Etzion-Fuchs <aetzion@codeaurora.org>
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Documentation/arm/msm/tsc.txt
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Introduction
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============
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TSC Driver
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The TSC (Transport Stream Controller) is a hardware block used in products such
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as smart TVs, Set-top boxes and digital media adapters, and is responsible for
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two main functionalities:
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1. Mux function: enabling the routing of MPEG-2 transport streams (TS) received
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from terrestrial/cable/satelite in order to support the different topologies of
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the end product, as it may be deployed in many different topologies.
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In addition, the active topology may change according to various factors such as
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broadcast technology and/or conditional access system.
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2. CI function: acting as a common interface, complying with both PC Card and
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CI/+ specifications.
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The TSC driver has two different interfaces, one for each function.
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Hardware description
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====================
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The TSC HW contains the TSC core, and uses the VBIF unit (IOMMU) which is part
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of the broadcast subsystem HW.
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Mux function:
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-------------
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The TSC can receive transport streams from:
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a. Two Transport Stream Interfaces (TSIFs) 0 or 1, connected to two external
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demods or to external bridge.
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b. One TSIF from an integrated demod.
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The TSC can route TS from any of the above TSIFs to an external CICAM, using a
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software configurable mux.
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The TSC can route TS from any of the above TSIFs, and TS received from the CI
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Conditional Access Mudule (CICAM) to two TSIF outputs (0 or 1), using two
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software configurable muexes.
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The CICAM input and outputs are also managed via two additional TSIFs: TSIF-out
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to the CAM, and TSIF-in from the CAM.
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CI function:
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------------
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The common interface is composed of:
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1. Card detection logic: the TSC notifies the SW of any change in the card
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detection status (via HW interrupt).
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2. Control interface used to send/receive the CI messages (APDUs), supporting
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data transmission in two formats:
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a. Single byte transactions: to/from the attribute memory space of the CAM and
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the command area of the CAM.
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b. Buffer transactions: to/from the command area of the CAM, using a
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configurable buffer size of 1k bytes-64k bytes. This enables transferring
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large chunks of data between the CAM and applications.
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The data buffer resides in the external memory and the interface to the
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memory is done through BCSS VBIF.
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The TSC uses PCMCIA interface to interact with the CAM.
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The following diagram provides an overview of the TSC HW:
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+-------------------------------------------------------------------------+
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| |
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| +------------------------------+ |
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| +-----------+ | TSC Core --. | |
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| |Ext. TSIF 0+------------+------------>| \ | +-----------+ |
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| +-----------+ | +-----|------------>|Mux)----->TSPP TSIF 0| |
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| +-----------+ | | +--|------------>| / | +-----------+ |
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| |Ext. TSIF 1+------| | | +->--' | |
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| +-----------+ | | | | | --. | |
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| | | | +----------|->| \ | +-----------+ |
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| +-----------+ | +--|--|-+--------|->|Mux)----->TSPP TSIF 1| |
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| |Int. TSIF +---------+--|-|-+------|->| / | +-----------+ |
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| +-----------+ | | | | +->--' | |
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| | | | | | | |
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| | | | | | | |
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| |+------+(v-v-v--) | +-----+| |
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| ||Card | \ Mux / | |CI/+ +---Data-Interface--+ |
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| ||detect| `---' | +----++| | |
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| |+-^-^--+ | | | | | |
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| +--|-|-------|-------|-------|-+ +------+----+ |
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| | | | | | | VBIF | |
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| | | +-----v--+ +--+----+ | | | |
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| | | |TSIF-Out| |TSIF-In| | +-----------+ |
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| | | +-----+--+ +--^----+ | |
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| | | | | | |
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| ++-+-------v-------+-------++ |
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| | CICAM | |
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| +---------------------------+ |
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+-------------------------------------------------------------------------+
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Software description
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====================
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The TSC Linux kernel driver manages the TSC core. It is a standard Linux
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platform device driver. It can be configured as a loadable or built-in kernel
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module. The driver is supported only in platforms that contain the TSC HW.
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The TSC driver uses ION driver to control the IOMMU and map user-allocated
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buffers to the TSC IOMMU domain.
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The driver provides an abstraction of the TSC HW functionality for user-space
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clients via two separate interfaces: tsc_mux and tsc_ci. These interfaces may
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be used by upper layers to utilize the TSC HW for routing the TS and supporting
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the Common Interface specification.
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Driver initialization
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---------------------
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The driver's probe function is invoked if there is a matching device tree node.
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The probe function gets the required memory resources (i.e., register address
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spaces) and maps them to kernel space for the driver's use.
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The probe function also requests the required IRQs, GPIOs and clocks, and gets
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the TSC IOMMU domain. The probe function also disables the TSIFs input.
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Finally, the function creates two character device drivers: "tsc_mux","tsc_ci".
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See API description in interface section.
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Data paths
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-----------
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The TSC does not process the TS data received from the TSIFs. It just manages
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the routing of that data.
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Control paths - Mux function
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----------------------------
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Example for routing the TS from external demod TSIF 0 to the CAM, and from the
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CAM to TSIF 1 of the TSPP:
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struct tsc_route tsif_cam = {TSC_SOURCE_EXTERNAL0, TSC_DEST_CICAM};
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struct tsc_route cam_tspp = {TSC_SOURCE_CICAM, TSC_DEST_TSPP1};
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int mux_fd, ret;
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enum tsc_source tsif0 = TSC_SOURCE_EXTERNAL0;
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enum tsc_source cam = TSC_SOURCE_CICAM;
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/* opening Mux char device */
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mux_fd = open("/dev/tsc_mux0");
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/* Configure the CAM mux to route TS from external demod TSIF 0: */
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ret = ioctl(mux_fd, TSC_CONFIG_ROUTE, &tsif_cam);
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/* Configure the TSPP TSIF 1 mux to route TS from CAM: */
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ret = ioctl(mux_fd, TSC_CONFIG_ROUTE, &cam_tspp);
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/* Enabling the external demod TSIF 0, and the CAM TSIF-in and TSIF-out */
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ret = ioctl(mux_fd, TSC_ENABLE_INPUT, &tsif0);
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ret = ioctl(mux_fd, TSC_ENABLE_INPUT, &cam);
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close(mux_fd);
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Control paths - CI function
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---------------------------
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Example for writing a buffer to the CAM command area:
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Assumptions:
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1. The user allocated a buffer using ION driver and wrote to that buffer.
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Also, retrieved the ion fd of that buffer and saved it to:
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int buffer_fd;
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2. The user already performed buffer size negotiation with the CAM according to
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CI/+ specification, and had set the CAM size register with the buffer size. This
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size is saved to: int size;
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3. The user decided about the time the user wants to wait for the data
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transmission.
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struct tsc_buffer_mode buff_params = {buffer_fd, size, timeout};
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int ret;
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/* Perform a blocking write buffer transaction for at most timeout */
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ret = ioctl(fd, TSC_WRITE_CAM_BUFFER, &buff_params);
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/* ret indicate whether the transaction succeeded */
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Example for SW reset to the CAM (according to CI/+ specification):
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struct single_byte_mode cmd_params = {1, RS bit set, timeout};
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struct single_byte_mode stat_params = {1, not initialize, timeout};
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int ci_fd, ret;
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u8 data;
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/* opening CI char device */
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ci_fd = open("/dev/tsc_ci0");
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/* Setting the RS bit of the CAM command register */
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ret = ioctl(ci_fd, TSC_WRITE_CAM_IO, &cmd_params);
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/* Polling the FR bit of the CAM status register */
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ret = ioctl(ci_fd, TSC_READ_CAM_IO, &stat_params);
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data = stat_params.data;
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while (data & FR_BIT_MASK) {
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ret = ioctl(ci_fd, TSC_READ_CAM_IO, &stat_params);
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data = stat_params.data;
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}
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close(ci_fd);
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Design
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======
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The TSC driver is a regular Linux platform driver designed to support the
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TSC HW available on specific SoCs.
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The driver provides two user-space APIs: tsc_mux that allows the client full
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control over the configuration of the TS routing, and tsc_ci that enables the
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client to implement the Common Interface in front of the CAM. It does so while
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encapsulating HW implementation details that are not relevant to the clients.
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The driver enforces HW restrictions and checks for input parameters
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validity, providing a success or failure return value for each API function:
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0 upon success or negative value on failure. Errno parameter is set to indicate
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the failure reason.
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However, the driver does not enforce any high-level policy with regard to the
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correct use of the TSC HW for various use-cases.
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Power Management
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================
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The TSC driver prevents the CPU from sleeping while the HW is active by using
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wakeup_source API. When there are no open devices the driver releases the wakeup
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source. In a similar manner, the driver enables the HW clocks only when needed.
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SMP/multi-core
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==============
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The driver uses a spinlock to protect accesses to its internal databases,
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for synchronization between user control API and kernel interrupt handlers.
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The driver uses a mutex for all the Mux operations to synchronize access to the
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routing internal databases. The driver uses another mutex for all the CI
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operations to synchronize data sent and received to and from the CAM.
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Security
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========
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Although the TSC is the bridge the external conditional access module, it has no
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security aspects. Any protection which is needed is performed by the upper
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layers. For example, the messages which are written to the CAM are encrypted.
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Thus the TSC accesses only non-protected, HLOS accessible memory regions.
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Performance
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===========
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Control operations are not considered as performance critical.
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Most of the control operations are assumed to be fairly uncommon.
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Interface
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=========
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Kernel-space API
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----------------
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The TSC driver does not provide any kernel-space API, only a user-space API.
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User-space API
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----------------
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Open: upper layer can open tsc_mux device and/or tsc_ci device.
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Release: close the device and release all the allocated resources.
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Poll: two different functions- one for Mux, one for CI. The Mux poll wait for
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rate mismatch interrupt. The CI poll waits for card detection HW interrupt.
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The rate mismatch interrupt is not cleared in the interrupt handler because it
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will signal again all the time. Therefore it is cleared via a specific ioctl
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that upper layer can use after the problem is solved. Additionally, the
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interrupt is cleared when the card is removed.
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ioctl: two functions, one for mux and one for ci. The ioctl are specified below.
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TSC Mux - routing the TS:
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-------------------------
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enum tsc_source {
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TSC_SOURCE_EXTERNAL0,
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TSC_SOURCE_EXTERNAL1,
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TSC_SOURCE_INTERNAL,
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TSC_SOURCE_CICAM
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};
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enum tsc_dest {
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TSC_DEST_TSPP0,
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TSC_DEST_TSPP1,
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TSC_DSET_CICAM
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};
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struct tsc_route {
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enum tsc_source source;
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enum tsc_dest dest;
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};
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#define TSC_CONFIG_ROUTE _IOW(TSC_IOCTL_BASE, 0, struct tsc_tspp_route)
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#define TSC_ENABLE_INPUT _IOW(TSC_IOCTL_BASE, 1, enum tsc_source)
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#define TSC_DISABLE_INPUT _IOW(TSC_IOCTL_BASE, 2, enum tsc_source)
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These 3 IOCTLs control the 3 muxes that route the TS, and enable/disable the
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TSIFs input.
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TSC Mux - configuring the TSIFs:
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--------------------------------
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enum tsc_data_type {
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TSC_DATA_TYPE_SERIAL,
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TSC_DATA_TYPE_PARALLEL
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};
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enum tsc_receive_mode {
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TSC_RECEIVE_MODE_START_VALID,
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TSC_RECEIVE_MODE_START_ONLY,
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TSC_RECEIVE_MODE_VALID_ONLY
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};
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struct tsc_tsif_params {
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enum tsc_source source;
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enum tsc_receive_mode receive_mode;
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enum tsc_data_type data_type;
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int clock_polarity;
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int data_polarity;
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int start_polarity;
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int valid_polarity;
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int error_polarity;
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int data_swap;
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int set_error;
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};
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#define TSC_SET_TSIF_CONFIG _IOW(TSC_IOCTL_BASE, 3, struct tsc_tsif_params)
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This IOCTL enables configuring a specific TSIF with all possible configurations.
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TSC Mux - clearing rate mismatch interrupt
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------------------------------------------
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#define TSC_CLEAR_RATE_MISMATCH_IRQ _IO(TSC_IOCTL_BASE, 4)
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This IOCTL is used for clearing the interrupt, which is not done automatically
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by the driver.
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TSC CI - CAM configuration:
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---------------------------
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enum tsc_cam_personality {
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TSC_CICAM_PERSONALITY_CI,
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TSC_CICAM_PERSONALITY_CIPLUS,
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TSC_CICAM_PERSONALITY_PCCARD,
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TSC_CICAM_PERSONALITY_DISABLE
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};
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enum tsc_card_status {
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TSC_CARD_STATUS_NOT_DETECTED,
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TSC_CARD_STATUS_DETECTED,
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TSC_CARD_STATUS_FAILURE
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};
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#define TSC_CICAM_SET_CLOCK _IOW(TSC_IOCTL_BASE, 5, int)
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This IOCTL sets the clock rate of the TS from the TSC to the CAM
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#define TSC_CAM_RESET _IO(TSC_IOCTL_BASE, 6)
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This IOCTL performs HW reset to the CAM
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#define TSC_CICAM_PERSONALITY_CHANGE \
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_IOW(TSC_IOCTL_BASE, 7, enum tsc_cam_personality)
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This IOCTL configures the PCMCIA pins according to the specified card type.
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#define TSC_GET_CARD_STATUS _IOR(TSC_IOCTL_BASE, 8, enum tsc_card_status)
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This IOCTL queries the card detection pins and returns their status.
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TSC CI - Data transactions:
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---------------------------
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struct tsc_single_byte_mode {
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u16 address;
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u8 data;
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int timeout; /* in msec */
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};
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struct tsc_buffer_mode {
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int buffer_fd;
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u16 buffer_size;
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int timeout; /* in msec */
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};
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#define TSC_READ_CAM_MEMORY \
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_IOWR(TSC_IOCTL_BASE, 9, struct tsc_single_byte_mode)
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||||||
|
#define TSC_WRITE_CAM_MEMORY \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 10, struct tsc_single_byte_mode)
|
||||||
|
#define TSC_READ_CAM_IO \
|
||||||
|
_IOWR(TSC_IOCTL_BASE, 11, struct tsc_single_byte_mode)
|
||||||
|
#define TSC_WRITE_CAM_IO \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 12, struct tsc_single_byte_mode)
|
||||||
|
#define TSC_READ_CAM_BUFFER \
|
||||||
|
_IOWR(TSC_IOCTL_BASE, 13, struct tsc_buffer_mode)
|
||||||
|
#define TSC_WRITE_CAM_BUFFER \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 14, struct tsc_buffer_mode)
|
||||||
|
|
||||||
|
These IOCTLs performs a read/write data transaction of the requested type.
|
||||||
|
|
||||||
|
Driver parameters
|
||||||
|
=================
|
||||||
|
The TSC module receives three parameter:
|
||||||
|
tsc_iommu_bypass - 0 for using the VBIF, 1 for not using it. Not using the VBIF
|
||||||
|
is a debug configuration.
|
||||||
|
ts0_config- 1 for TS0-A configuration, 2 for TS0-B configuration.
|
||||||
|
ts1_config- 1 for TS1-A configuration, 2 for TS1-B configuration.
|
||||||
|
|
||||||
|
Config options
|
||||||
|
==============
|
||||||
|
To enable the driver, set CONFIG_TSC to y (built-in) or m (kernel module)
|
||||||
|
in the kernel configuration menu.
|
||||||
|
|
||||||
|
Dependencies
|
||||||
|
============
|
||||||
|
The TSC driver uses the ION driver for IOMMU registration and buffer
|
||||||
|
mapping to BCSS VBIF.
|
||||||
|
|
||||||
|
User space utilities
|
||||||
|
====================
|
||||||
|
None.
|
||||||
|
|
||||||
|
Other
|
||||||
|
=====
|
||||||
|
None.
|
||||||
|
|
||||||
|
Known issues
|
||||||
|
============
|
||||||
|
None.
|
||||||
|
|
||||||
|
To do
|
||||||
|
=====
|
||||||
|
None.
|
||||||
152
Documentation/devicetree/bindings/arm/msm/msm_tsc.txt
Normal file
152
Documentation/devicetree/bindings/arm/msm/msm_tsc.txt
Normal file
|
|
@ -0,0 +1,152 @@
|
||||||
|
MSM TSC - Transport Stream Controller
|
||||||
|
|
||||||
|
TSPP2 is a HW unit for routing MPEG-2 Transport Stream packets and communicating
|
||||||
|
with the CAM over Common Interface.
|
||||||
|
For information on the TSC driver, please refer to the TSC driver
|
||||||
|
documentation: Documentation/arm/msm/tsc.txt.
|
||||||
|
|
||||||
|
The device tree representation of the TSPP2 block should be:
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible: "qti,msm-tsc"
|
||||||
|
- reg: physical memory base addresses and sizes for the TSC.
|
||||||
|
- reg-names: name of the memory region: "tsc-base".
|
||||||
|
- interrupts: represents IRQ numbers for the TSC.
|
||||||
|
- interrupt-names: TSC interrupt names: "cam-cmd" and "card-detect".
|
||||||
|
- qti,iommu-group: phandle for the Broadcast HLOS IOMMU domain.
|
||||||
|
The Broadcast HLOS IOMMU domain includes a context bank and virtual address
|
||||||
|
pools definitions, used for mapping non-secured pipe memory buffers.
|
||||||
|
- qti,iommu-partition: partition number in the HLOS IOMMU domain.
|
||||||
|
- vdd-supply: phandle of the Broadcast GDSC as defined in msm-gdsc.dtsi.
|
||||||
|
- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
|
||||||
|
the below optional properties:
|
||||||
|
- qcom,msm-bus,name
|
||||||
|
- qcom,msm-bus,num-cases
|
||||||
|
- qcom,msm-bus,num-paths
|
||||||
|
- qcom,msm-bus,vectors-KBps
|
||||||
|
- pinctrl-states: the names of the pinctrl states that used by the driver to
|
||||||
|
configure the TLMM pins.
|
||||||
|
- pinctrl-#: a list of pinctrl phandles for the different pinctrl states. Refer
|
||||||
|
to "Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt" for the
|
||||||
|
pinctrl handles definitions. Each pinctrl-# corresponds to the respective
|
||||||
|
state name that appears under pinctrl-state list.
|
||||||
|
- qti,tsc-reset-cam-gpio: gpio for HW reset to the CAM.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
tsc: msm_tsc@fc74a000 {
|
||||||
|
compatible = "qti,msm-tsc";
|
||||||
|
reg = <0xfc74a000 0x1110>;
|
||||||
|
reg-names = "tsc-base";
|
||||||
|
interrupts = <0 267 0>, /* cam-cmd */
|
||||||
|
<0 268 0>; /* card-detect */
|
||||||
|
interrupt-names = "cam-cmd",
|
||||||
|
"card-detect";
|
||||||
|
qti,iommu-group = <&bcast_domain_hlos>;
|
||||||
|
qti,iommu-partition = <1>;
|
||||||
|
vdd-supply = <&gdsc_bcss>;
|
||||||
|
qti,msm-bus,name = "tsc-bus";
|
||||||
|
qti,msm-bus,num-cases = <2>;
|
||||||
|
qti,msm-bus,num-paths = <1>;
|
||||||
|
qti,msm-bus,vectors-KBps = <96 512 0 0>, /* No vote */
|
||||||
|
<96 512 448 896>; /* Max. 7Mbps */
|
||||||
|
pinctrl-states = "ts0-a-start-active", "ts0-a-start-sleep",
|
||||||
|
"ts0-a-valid-active", "ts0-a-valid-sleep",
|
||||||
|
"ts0-a-err-active", "ts0-a-err-sleep", "ts0-a-ser-active",
|
||||||
|
"ts0-a-ser-sleep", "ts0-a-par-active", "ts0-a-par-sleep",
|
||||||
|
"ts0-b-start-active", "ts0-b-start-sleep",
|
||||||
|
"ts0-b-valid-active", "ts0-b-valid-sleep",
|
||||||
|
"ts0-b-err-active", "ts0-b-err-sleep", "ts0-b-ser-active",
|
||||||
|
"ts0-b-ser-sleep", "ts0-b-par-active", "ts0-b-par-sleep",
|
||||||
|
"ts1-a-start-active", "ts1-a-start-sleep",
|
||||||
|
"ts1-a-valid-active", "ts1-a-valid-sleep",
|
||||||
|
"ts1-a-err-active", "ts1-a-err-sleep", "ts1-a-ser-active",
|
||||||
|
"ts1-a-ser-sleep", "ts1-a-par-active", "ts1-a-par-sleep",
|
||||||
|
"ts1-b-start-active", "ts1-b-start-sleep",
|
||||||
|
"ts1-b-valid-active", "ts1-b-valid-sleep",
|
||||||
|
"ts1-b-err-active", "ts1-b-err-sleep", "ts1-b-ser-active",
|
||||||
|
"ts1-b-ser-sleep", "card-detect-pins",
|
||||||
|
"card-power-up-disable", "card-insert-enable",
|
||||||
|
"card-not-ci-disable", "card-ci-enable",
|
||||||
|
"not-ci-plus-disable-ireq";
|
||||||
|
pinctrl-0 = <&ts_in_0_a_start_active>; /* ts0-a-start-active */
|
||||||
|
pinctrl-1 = <&ts_in_0_a_start_sleep>; /* ts0-a-start-sleep */
|
||||||
|
pinctrl-2 = <&ts_in_0_a_valid_active>; /* ts0-a-valid-active */
|
||||||
|
pinctrl-3 = <&ts_in_0_a_valid_sleep>; /* ts0-a-valid-sleep */
|
||||||
|
pinctrl-4 = <&ts_in_0_a_err_active>; /* ts0-a-err-active */
|
||||||
|
pinctrl-5 = <&ts_in_0_a_err_active>; /* ts0-a-err-sleep */
|
||||||
|
pinctrl-6 = <&ts_in_0_a_ser_active>; /* ts0-a-ser-active */
|
||||||
|
pinctrl-7 = <&ts_in_0_a_ser_sleep>; /* ts0-a-ser-sleep */
|
||||||
|
pinctrl-8 = <&ts_in_0_a_ser_active /* ts0-a-par-active */
|
||||||
|
&ts_in_0_a_par_active>;
|
||||||
|
pinctrl-9 = <&ts_in_0_a_ser_sleep /* ts0-a-par-sleep */
|
||||||
|
&ts_in_0_a_par_sleep>;
|
||||||
|
pinctrl-10 = <&ts_in_0_b_start_active>; /* ts0-b-start-active */
|
||||||
|
pinctrl-11 = <&ts_in_0_b_start_sleep>; /* ts0-b-start-sleep */
|
||||||
|
pinctrl-12 = <&ts_in_0_b_valid_active>; /* ts0-b-valid-active */
|
||||||
|
pinctrl-13 = <&ts_in_0_b_valid_sleep>; /* ts0-b-valid-sleep */
|
||||||
|
pinctrl-14 = <&ts_in_0_b_err_active>; /* ts0-b-err-active */
|
||||||
|
pinctrl-15 = <&ts_in_0_b_err_sleep>; /* ts0-b-err-sleep */
|
||||||
|
pinctrl-16 = <&ts_in_0_b_ser_active>; /* ts0-b-ser-active */
|
||||||
|
pinctrl-17 = <&ts_in_0_b_ser_sleep>; /* ts0-b-ser-sleep */
|
||||||
|
pinctrl-18 = <&ts_in_0_b_ser_active /* ts0-b-par-active */
|
||||||
|
&ts_in_0_b_par_1_active
|
||||||
|
&ts_in_0_b_par_2_active
|
||||||
|
&ts_in_0_b_par_3_active>;
|
||||||
|
pinctrl-19 = <&ts_in_0_b_ser_sleep /* ts0-b-par-sleep */
|
||||||
|
&ts_in_0_b_par_1_sleep
|
||||||
|
&ts_in_0_b_par_2_active
|
||||||
|
&ts_in_0_b_par_3_sleep>;
|
||||||
|
pinctrl-20 = <&ts_in_1_a_start_active>; /* ts1-a-start-active */
|
||||||
|
pinctrl-21 = <&ts_in_1_a_start_sleep>; /* ts1-a-start-sleep */
|
||||||
|
pinctrl-22 = <&ts_in_1_a_valid_active>; /* ts1-a-valid-active */
|
||||||
|
pinctrl-23 = <&ts_in_1_a_valid_sleep>; /* ts1-a-valid-sleep */
|
||||||
|
pinctrl-24 = <&ts_in_1_a_err_active>; /* ts1-a-err-active */
|
||||||
|
pinctrl-25 = <&ts_in_1_a_err_sleep>; /* ts1-a-err-sleep */
|
||||||
|
pinctrl-26 = <&ts_in_1_a_ser_active>; /* ts1-a-ser-active */
|
||||||
|
pinctrl-27 = <&ts_in_1_a_ser_sleep>; /* ts1-a-ser-sleep */
|
||||||
|
pinctrl-28 = <&ts_in_1_a_ser_active /* ts1-a-par-active */
|
||||||
|
&ts_in_1_a_par_active>;
|
||||||
|
pinctrl-29 = <&ts_in_1_a_ser_sleep /* ts1-a-par-sleep */
|
||||||
|
&ts_in_1_a_par_sleep>;
|
||||||
|
pinctrl-30 = <&ts_in_1_b_start_active>; /* ts1-b-start-active */
|
||||||
|
pinctrl-31 = <&ts_in_1_b_start_sleep>; /* ts1-b-start-sleep */
|
||||||
|
pinctrl-32 = <&ts_in_1_b_valid_active>; /* ts1-b-valid-active */
|
||||||
|
pinctrl-33 = <&ts_in_1_b_valid_sleep>; /* ts1-b-valid-sleep */
|
||||||
|
pinctrl-34 = <&ts_in_1_b_err_active>; /* ts1-b-err-active */
|
||||||
|
pinctrl-35 = <&ts_in_1_b_err_sleep>; /* ts1-b-err-sleep */
|
||||||
|
pinctrl-36 = <&ts_in_1_b_1_ser_active /* ts1-b-ser-active */
|
||||||
|
&ts_in_1_b_2_ser_active>;
|
||||||
|
pinctrl-37 = <&ts_in_1_b_1_ser_sleep /* ts1-b-ser-sleep */
|
||||||
|
&ts_in_1_b_2_ser_sleep>;
|
||||||
|
pinctrl-38 = <&tsc_cd_pins_active>; /* card-detect-pins */
|
||||||
|
pinctrl-39 = <&tsc_pcmcia_8ma_down_pc_card_sleep /* card-power-up-disable */
|
||||||
|
&tsc_pcmcia_8ma_up_pc_card_sleep
|
||||||
|
&tsc_cam_reset_pc_card_sleep
|
||||||
|
&tsc_pcmcia_8ma_none_pc_card_sleep
|
||||||
|
&tsc_pcmcia_ireq_pc_card_sleep
|
||||||
|
&tsc_pcmcia_2_pc_card_sleep
|
||||||
|
&tsc_pcmcia_1_down_ci_sleep
|
||||||
|
&tsc_pcmcia_1_up_ci_sleep
|
||||||
|
&tsc_pcmcia_1_none_ci_sleep
|
||||||
|
&tsc_pcmcia_4_ci_sleep>;
|
||||||
|
pinctrl-40 = <&tsc_pcmcia_8ma_down_pc_card_active /* card-insert-enable */
|
||||||
|
&tsc_pcmcia_8ma_up_pc_card_active
|
||||||
|
&tsc_cam_reset_pc_card_active
|
||||||
|
&tsc_pcmcia_8ma_none_pc_card_active
|
||||||
|
&tsc_pcmcia_ireq_pc_card_active
|
||||||
|
&tsc_pcmcia_2_pc_card_active>;
|
||||||
|
pinctrl-41 = <&tsc_pcmcia_8ma_down_pc_card_sleep /* card-not-ci-disable */
|
||||||
|
&tsc_pcmcia_8ma_up_pc_card_sleep
|
||||||
|
&tsc_cam_reset_pc_card_sleep
|
||||||
|
&tsc_pcmcia_8ma_none_pc_card_sleep
|
||||||
|
&tsc_pcmcia_ireq_pc_card_sleep
|
||||||
|
&tsc_pcmcia_2_pc_card_sleep>;
|
||||||
|
pinctrl-42 = <&tsc_pcmcia_1_down_ci_active /* card-ci-enable */
|
||||||
|
&tsc_pcmcia_1_up_ci_active
|
||||||
|
&tsc_pcmcia_1_none_ci_active
|
||||||
|
&tsc_pcmcia_4_ci_active>;
|
||||||
|
pinctrl-43 = <&tsc_pcmcia_ireq_pc_card_sleep>; /* not-ci-plus-disable-ireq */
|
||||||
|
qti,tsc-reset-cam-gpio = <&msm_gpio 138 0>; /* reset-pin controller */
|
||||||
|
};
|
||||||
|
|
@ -6848,15 +6848,24 @@ static struct clk_lookup mpq_clocks_8092[] = {
|
||||||
CLK_LOOKUP("", bcc_dem_core_div2_clk.c, ""),
|
CLK_LOOKUP("", bcc_dem_core_div2_clk.c, ""),
|
||||||
CLK_LOOKUP("", bcc_ts_out_clk.c, ""),
|
CLK_LOOKUP("", bcc_ts_out_clk.c, ""),
|
||||||
CLK_LOOKUP("", bcc_tsc_ci_clk.c, ""),
|
CLK_LOOKUP("", bcc_tsc_ci_clk.c, ""),
|
||||||
|
CLK_LOOKUP("bcc_tsc_ci_clk", bcc_tsc_ci_clk.c, "fc74a000.msm_tsc"),
|
||||||
CLK_LOOKUP("", bcc_tsc_cicam_ts_clk.c, ""),
|
CLK_LOOKUP("", bcc_tsc_cicam_ts_clk.c, ""),
|
||||||
|
CLK_LOOKUP("bcc_tsc_cicam_ts_clk", bcc_tsc_cicam_ts_clk.c,
|
||||||
|
"fc74a000.msm_tsc"),
|
||||||
CLK_LOOKUP("", bcc_tsc_par_clk.c, ""),
|
CLK_LOOKUP("", bcc_tsc_par_clk.c, ""),
|
||||||
|
CLK_LOOKUP("bcc_tsc_par_clk", bcc_tsc_par_clk.c, "fc74a000.msm_tsc"),
|
||||||
CLK_LOOKUP("", bcc_tsc_ser_clk.c, ""),
|
CLK_LOOKUP("", bcc_tsc_ser_clk.c, ""),
|
||||||
|
CLK_LOOKUP("bcc_tsc_ser_clk", bcc_tsc_ser_clk.c, "fc74a000.msm_tsc"),
|
||||||
CLK_LOOKUP("", bcc_tspp2_core_clk.c, ""),
|
CLK_LOOKUP("", bcc_tspp2_core_clk.c, ""),
|
||||||
CLK_LOOKUP("bcc_tspp2_core_clk", bcc_tspp2_core_clk.c,
|
CLK_LOOKUP("bcc_tspp2_core_clk", bcc_tspp2_core_clk.c,
|
||||||
"fc724000.msm_tspp2"),
|
"fc724000.msm_tspp2"),
|
||||||
|
CLK_LOOKUP("bcc_tspp2_core_clk", bcc_tspp2_core_clk.c,
|
||||||
|
"fc74a000.msm_tsc"),
|
||||||
CLK_LOOKUP("", bcc_vbif_tspp2_clk.c, ""),
|
CLK_LOOKUP("", bcc_vbif_tspp2_clk.c, ""),
|
||||||
CLK_LOOKUP("bcc_vbif_tspp2_clk", bcc_vbif_tspp2_clk.c,
|
CLK_LOOKUP("bcc_vbif_tspp2_clk", bcc_vbif_tspp2_clk.c,
|
||||||
"fc724000.msm_tspp2"),
|
"fc724000.msm_tspp2"),
|
||||||
|
CLK_LOOKUP("bcc_vbif_tspp2_clk", bcc_vbif_tspp2_clk.c,
|
||||||
|
"fc74a000.msm_tsc"),
|
||||||
CLK_LOOKUP("bcc_vbif_dem_core_clk", bcc_vbif_dem_core_clk.c,
|
CLK_LOOKUP("bcc_vbif_dem_core_clk", bcc_vbif_dem_core_clk.c,
|
||||||
"fc600000.msm-demod"),
|
"fc600000.msm-demod"),
|
||||||
CLK_LOOKUP("", bcc_vbif_dem_core_clk.c, ""),
|
CLK_LOOKUP("", bcc_vbif_dem_core_clk.c, ""),
|
||||||
|
|
@ -6869,6 +6878,7 @@ static struct clk_lookup mpq_clocks_8092[] = {
|
||||||
CLK_LOOKUP("iface_wrap_clk", bcc_dem_ahb_clk.c, "fc600000.msm-demod"),
|
CLK_LOOKUP("iface_wrap_clk", bcc_dem_ahb_clk.c, "fc600000.msm-demod"),
|
||||||
CLK_LOOKUP("", bcc_dem_ahb_clk.c, ""),
|
CLK_LOOKUP("", bcc_dem_ahb_clk.c, ""),
|
||||||
CLK_LOOKUP("", bcc_tsc_ahb_clk.c, ""),
|
CLK_LOOKUP("", bcc_tsc_ahb_clk.c, ""),
|
||||||
|
CLK_LOOKUP("bcc_tsc_ahb_clk", bcc_tsc_ahb_clk.c, "fc74a000.msm_tsc"),
|
||||||
CLK_LOOKUP("", bcc_tspp2_ahb_clk.c, ""),
|
CLK_LOOKUP("", bcc_tspp2_ahb_clk.c, ""),
|
||||||
CLK_LOOKUP("bcc_tspp2_ahb_clk", bcc_tspp2_ahb_clk.c,
|
CLK_LOOKUP("bcc_tspp2_ahb_clk", bcc_tspp2_ahb_clk.c,
|
||||||
"fc724000.msm_tspp2"),
|
"fc724000.msm_tspp2"),
|
||||||
|
|
|
||||||
|
|
@ -35,3 +35,13 @@ config CI_BRIDGE_SPI
|
||||||
|
|
||||||
To compile this driver as module, choose M here.
|
To compile this driver as module, choose M here.
|
||||||
|
|
||||||
|
config TSC
|
||||||
|
depends on ARCH_MPQ8092
|
||||||
|
tristate "TSC (Transport Stream Controller) Support"
|
||||||
|
---help---
|
||||||
|
Transport Stream Controller is used for two major functionalities:
|
||||||
|
Mux: enable the routing of the MPEG transport strems from multiple
|
||||||
|
sources to multiple destinations.
|
||||||
|
CI: communication with the internal Conditional Access Module (CAM)
|
||||||
|
over Common Interface (CI).
|
||||||
|
This can also be compiled as a loadable module.
|
||||||
|
|
|
||||||
|
|
@ -5,3 +5,4 @@
|
||||||
obj-$(CONFIG_TSPP) += tspp.o
|
obj-$(CONFIG_TSPP) += tspp.o
|
||||||
obj-$(CONFIG_TSPP2) += tspp2.o
|
obj-$(CONFIG_TSPP2) += tspp2.o
|
||||||
obj-$(CONFIG_CI_BRIDGE_SPI) += ci-bridge-spi.o
|
obj-$(CONFIG_CI_BRIDGE_SPI) += ci-bridge-spi.o
|
||||||
|
obj-$(CONFIG_TSC) += tsc.o
|
||||||
|
|
|
||||||
3140
drivers/media/platform/msm/broadcast/tsc.c
Normal file
3140
drivers/media/platform/msm/broadcast/tsc.c
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -466,3 +466,4 @@ header-y += xattr.h
|
||||||
header-y += xfrm.h
|
header-y += xfrm.h
|
||||||
header-y += hw_breakpoint.h
|
header-y += hw_breakpoint.h
|
||||||
header-y += android_pmem.h
|
header-y += android_pmem.h
|
||||||
|
header-y += tsc.h
|
||||||
|
|
|
||||||
161
include/uapi/linux/tsc.h
Normal file
161
include/uapi/linux/tsc.h
Normal file
|
|
@ -0,0 +1,161 @@
|
||||||
|
#ifndef TSC_H_
|
||||||
|
#define TSC_H_
|
||||||
|
|
||||||
|
#include <linux/ioctl.h>
|
||||||
|
#include <linux/types.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ENUMS
|
||||||
|
*/
|
||||||
|
/* TSC sources that can transfer the TS out */
|
||||||
|
enum tsc_source {
|
||||||
|
TSC_SOURCE_EXTERNAL0,
|
||||||
|
TSC_SOURCE_EXTERNAL1,
|
||||||
|
TSC_SOURCE_INTERNAL,
|
||||||
|
TSC_SOURCE_CICAM
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC destinations that can receive TS */
|
||||||
|
enum tsc_dest {
|
||||||
|
TSC_DEST_TSPP0,
|
||||||
|
TSC_DEST_TSPP1,
|
||||||
|
TSC_DEST_CICAM
|
||||||
|
};
|
||||||
|
|
||||||
|
/** TSIF parameters **/
|
||||||
|
/* TSC data type - can be serial of parallel */
|
||||||
|
enum tsc_data_type {
|
||||||
|
TSC_DATA_TYPE_SERIAL = 0,
|
||||||
|
TSC_DATA_TYPE_PARALLEL = 1
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC receive mode - determine the usage of the VALID and START bits */
|
||||||
|
enum tsc_receive_mode {
|
||||||
|
TSC_RECEIVE_MODE_START_VALID = 0,
|
||||||
|
TSC_RECEIVE_MODE_START_ONLY = 1,
|
||||||
|
TSC_RECEIVE_MODE_VALID_ONLY = 2
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC polarity - can be normal or inversed */
|
||||||
|
enum tsc_polarity {
|
||||||
|
TSC_POLARITY_NORMAL = 0,
|
||||||
|
TSC_POLARITY_INVERSED = 1,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC data swap - whether LSB or MSB is sent first */
|
||||||
|
enum tsc_data_swap {
|
||||||
|
TSC_DATA_NORMAL = 0,
|
||||||
|
TSC_DATA_SWAP = 1
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC set error bit in ts header if ts_fail is enable */
|
||||||
|
enum tsc_set_error_bit {
|
||||||
|
TSC_SET_ERROR_BIT_DISABLE = 0,
|
||||||
|
TSC_SET_ERROR_BIT_ENABLE = 1
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC CAM personality type */
|
||||||
|
enum tsc_cam_personality {
|
||||||
|
TSC_CICAM_PERSONALITY_CI,
|
||||||
|
TSC_CICAM_PERSONALITY_CIPLUS,
|
||||||
|
TSC_CICAM_PERSONALITY_PCCARD,
|
||||||
|
TSC_CICAM_PERSONALITY_DISABLE
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC CAM card status */
|
||||||
|
enum tsc_card_status {
|
||||||
|
TSC_CARD_STATUS_DETECTED,
|
||||||
|
TSC_CARD_STATUS_NOT_DETECTED,
|
||||||
|
TSC_CARD_STATUS_FAILURE
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSC transaction error types */
|
||||||
|
enum tsc_transcation_error {
|
||||||
|
TSC_TRANSACTION_ERROR_ERR,
|
||||||
|
TSC_TRANSACTION_ERROR_RETRY,
|
||||||
|
TSC_TRANSACTION_ERROR_SPLIT
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* STRUCTS
|
||||||
|
*/
|
||||||
|
/* TSC route - configure a TS transfer from source to dest */
|
||||||
|
struct tsc_route {
|
||||||
|
enum tsc_source source;
|
||||||
|
enum tsc_dest dest;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TSIF parameters to configure the source TSIF */
|
||||||
|
struct tsc_tsif_params {
|
||||||
|
enum tsc_source source;
|
||||||
|
enum tsc_receive_mode receive_mode;
|
||||||
|
enum tsc_data_type data_type;
|
||||||
|
enum tsc_polarity clock_polarity;
|
||||||
|
enum tsc_polarity data_polarity;
|
||||||
|
enum tsc_polarity start_polarity;
|
||||||
|
enum tsc_polarity valid_polarity;
|
||||||
|
enum tsc_polarity error_polarity;
|
||||||
|
enum tsc_data_swap data_swap;
|
||||||
|
enum tsc_set_error_bit set_error;
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
/* Parameters to perform single byte data transaction */
|
||||||
|
struct tsc_single_byte_mode {
|
||||||
|
__u16 address;
|
||||||
|
__u8 data;
|
||||||
|
int timeout; /* in msec */
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Parameters to perform buffer data transaction */
|
||||||
|
struct tsc_buffer_mode {
|
||||||
|
int buffer_fd;
|
||||||
|
__u16 buffer_size;
|
||||||
|
int timeout; /* in msec */
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* defines for IOCTL functions
|
||||||
|
* read Documentation/ioctl-number.txt
|
||||||
|
* some random number to avoid coinciding with other ioctl numbers
|
||||||
|
*/
|
||||||
|
#define TSC_IOCTL_BASE 0xBA
|
||||||
|
|
||||||
|
/* TSC Mux IOCTLs */
|
||||||
|
#define TSC_CONFIG_ROUTE \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 0, struct tsc_route)
|
||||||
|
#define TSC_ENABLE_INPUT \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 1, enum tsc_source)
|
||||||
|
#define TSC_DISABLE_INPUT \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 2, enum tsc_source)
|
||||||
|
#define TSC_SET_TSIF_CONFIG \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 3, struct tsc_tsif_params)
|
||||||
|
#define TSC_CLEAR_RATE_MISMATCH_IRQ \
|
||||||
|
_IO(TSC_IOCTL_BASE, 4)
|
||||||
|
#define TSC_CICAM_SET_CLOCK \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 5, int)
|
||||||
|
|
||||||
|
/* TSC CI Card IOCTLs */
|
||||||
|
#define TSC_CAM_RESET \
|
||||||
|
_IO(TSC_IOCTL_BASE, 6)
|
||||||
|
#define TSC_CICAM_PERSONALITY_CHANGE\
|
||||||
|
_IOW(TSC_IOCTL_BASE, 7, enum tsc_cam_personality)
|
||||||
|
#define TSC_GET_CARD_STATUS \
|
||||||
|
_IOR(TSC_IOCTL_BASE, 8, enum tsc_card_status)
|
||||||
|
|
||||||
|
/* TSC CI Data IOCTLs */
|
||||||
|
#define TSC_READ_CAM_MEMORY \
|
||||||
|
_IOWR(TSC_IOCTL_BASE, 9, struct tsc_single_byte_mode)
|
||||||
|
#define TSC_WRITE_CAM_MEMORY \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 10, struct tsc_single_byte_mode)
|
||||||
|
#define TSC_READ_CAM_IO \
|
||||||
|
_IOWR(TSC_IOCTL_BASE, 11, struct tsc_single_byte_mode)
|
||||||
|
#define TSC_WRITE_CAM_IO \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 12, struct tsc_single_byte_mode)
|
||||||
|
#define TSC_READ_CAM_BUFFER \
|
||||||
|
_IOWR(TSC_IOCTL_BASE, 13, struct tsc_buffer_mode)
|
||||||
|
#define TSC_WRITE_CAM_BUFFER \
|
||||||
|
_IOW(TSC_IOCTL_BASE, 14, struct tsc_buffer_mode)
|
||||||
|
|
||||||
|
#endif /* TSC_H_ */
|
||||||
Loading…
Reference in a new issue