crypto: msm: Add support_hw_key flag

Add support_hw_key, hw_key flag to indicate if use of
HW KEY is supported by the driver.

Change-Id: If7976f5891afa211631597b8dab93ff17f0fa5c5
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>

Documentation/devicetree/bindings/crypto/msm/qcedev.txt

@@ -15,8 +15,7 @@ Required properties:
 
 Optional properties:
   - qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE.
-
-
+  - qcom,ce-hw-key : optional, indicates if the hardware supports use of HW KEY.
 
 Example:
 

Documentation/devicetree/bindings/crypto/msm/qcrypto.txt

@@ -15,7 +15,7 @@ Required properties:
 
 Optional properties:
   - qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE.
-
+  - qcom,ce-hw-key : optional, indicates if the hardware supports use of HW KEY.
 
 Example:
 

drivers/crypto/msm/qce.h

@@ -1,6 +1,6 @@
 /* Qualcomm Crypto Engine driver API
  *
- * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -116,6 +116,7 @@ struct ce_hw_support {
 	bool aligned_only;
 	bool bam;
 	bool is_shared;
+	bool hw_key;
 };
 
 /* Sha operation parameters */

drivers/crypto/msm/qce50.c

@@ -63,6 +63,7 @@ struct qce_device {
 	int memsize;				/* Memory allocated */
 	int is_shared;				/* CE HW is shared */
 	bool support_cmd_dscr;
+	bool support_hw_key;
 
 	void __iomem *iobase;	    /* Virtual io base of CE HW  */
 	unsigned int phy_iobase;    /* Physical io base of CE HW    */
@@ -3311,6 +3312,8 @@ static int __qce_get_device_tree_data(struct platform_device *pdev,
 
 	pce_dev->is_shared = of_property_read_bool((&pdev->dev)->of_node,
 				"qcom,ce-hw-shared");
+	pce_dev->support_hw_key = of_property_read_bool((&pdev->dev)->of_node,
+				"qcom,ce-hw-key");
 	if (of_property_read_u32((&pdev->dev)->of_node,
 				"qcom,bam-pipe-pair",
 				&pce_dev->ce_sps.pipe_pair_index)) {
@@ -3639,6 +3642,7 @@ int qce_hw_support(void *handle, struct ce_hw_support *ce_support)
 	ce_support->ota = false;
 	ce_support->bam = true;
 	ce_support->is_shared = (pce_dev->is_shared == 1) ? true : false;
+	ce_support->hw_key = pce_dev->support_hw_key;
 	ce_support->aes_ccm = true;
 	if (pce_dev->ce_sps.minor_version)
 		ce_support->aligned_only = false;

drivers/crypto/msm/qcedev.c

@@ -1937,9 +1937,10 @@ static int qcedev_probe(struct platform_device *pdev)
 	rc = misc_register(&podev->miscdevice);
 	qce_hw_support(podev->qce, &podev->ce_support);
 	if (podev->ce_support.bam) {
-		podev->platform_support.ce_shared = 0;
+		podev->platform_support.ce_shared = podev->ce_support.is_shared;
 		podev->platform_support.shared_ce_resource = 0;
-		podev->platform_support.hw_key_support = 0;
+		podev->platform_support.hw_key_support =
+						podev->ce_support.hw_key;
 		podev->platform_support.bus_scale_table = NULL;
 		podev->platform_support.sha_hmac = 1;
 

drivers/crypto/msm/qcrypto.c

@@ -3387,9 +3387,9 @@ static int  _qcrypto_probe(struct platform_device *pdev)
 	cp->pdev = pdev;
 	qce_hw_support(cp->qce, &cp->ce_support);
 	if (cp->ce_support.bam)	 {
-		cp->platform_support.ce_shared = 0;
+		cp->platform_support.ce_shared = cp->ce_support.is_shared;
 		cp->platform_support.shared_ce_resource = 0;
-		cp->platform_support.hw_key_support = 0;
+		cp->platform_support.hw_key_support = cp->ce_support.hw_key;
 		cp->platform_support.bus_scale_table =	NULL;
 		cp->platform_support.sha_hmac = 1;