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xtensa: fix ibreakenable register update 

Only set the register when there is at least one ibreak register,
otherwise the build fails:
	arch/xtensa/kernel/head.S:105: Error: invalid register 'ibreakenable'
	for 'wsr' instruction
	arch/xtensa/platforms/iss/setup.c:67: Error: invalid register
	'ibreakenable' for 'wsr' instruction

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
This commit is contained in:
Max Filippov 2013-03-04 03:40:42 +04:00 committed by Chris Zankel
parent 74f5bf029e
commit d83ff0bb82
4 changed files with 8 additions and 0 deletions
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2
arch/xtensa/kernel/head.S
View File

@ -86,7 +86,9 @@ ENTRY(_startup)
/* Clear debugging registers. */
#if XCHAL_HAVE_DEBUG
#if XCHAL_NUM_IBREAK > 0
wsr a0, ibreakenable
#endif
wsr a0, icount
movi a1, 15
wsr a0, icountlevel

2
arch/xtensa/platforms/iss/setup.c
View File

@ -64,7 +64,9 @@ void platform_restart(void)
"wsr a2, icountlevel\n\t"
"movi a2, 0\n\t"
"wsr a2, icount\n\t"
#if XCHAL_NUM_IBREAK > 0
"wsr a2, ibreakenable\n\t"
#endif
"wsr a2, lcount\n\t"
"movi a2, 0x1f\n\t"
"wsr a2, ps\n\t"

2
arch/xtensa/platforms/xt2000/setup.c
View File

@ -69,7 +69,9 @@ void platform_restart(void)
"wsr a2, icountlevel\n\t"
"movi a2, 0\n\t"
"wsr a2, icount\n\t"
#if XCHAL_NUM_IBREAK > 0
"wsr a2, ibreakenable\n\t"
#endif
"wsr a2, lcount\n\t"
"movi a2, 0x1f\n\t"
"wsr a2, ps\n\t"

2
arch/xtensa/platforms/xtfpga/setup.c
View File

@ -60,7 +60,9 @@ void platform_restart(void)
"wsr a2, icountlevel\n\t"
"movi a2, 0\n\t"
"wsr a2, icount\n\t"
#if XCHAL_NUM_IBREAK > 0
"wsr a2, ibreakenable\n\t"
#endif
"wsr a2, lcount\n\t"
"movi a2, 0x1f\n\t"
"wsr a2, ps\n\t"