mirror of
https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-09-22 04:15:02 +00:00
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
This commit is contained in:
commit
d936cfc720
98 changed files with 286 additions and 191 deletions
|
@ -1471,7 +1471,7 @@ config SB1_PASS_2_1_WORKAROUNDS
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||||||
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||||||
config 64BIT_PHYS_ADDR
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config 64BIT_PHYS_ADDR
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||||||
bool "Support for 64-bit physical address space"
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bool "Support for 64-bit physical address space"
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||||||
depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT
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depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT
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||||||
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||||||
config CPU_ADVANCED
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config CPU_ADVANCED
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bool "Override CPU Options"
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bool "Override CPU Options"
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||||||
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@ -1492,14 +1492,6 @@ config CPU_HAS_LLSC
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for better performance, N if you don't know. You must say Y here
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for better performance, N if you don't know. You must say Y here
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||||||
for multiprocessor machines.
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for multiprocessor machines.
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||||||
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||||||
config CPU_HAS_LLDSCD
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bool "lld/scd Instructions available" if CPU_ADVANCED
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default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1
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||||||
help
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||||||
Say Y here if your CPU has the lld and scd instructions, the 64-bit
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equivalents of ll and sc. Say Y here for better performance, N if
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you don't know. You must say Y here for multiprocessor machines.
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||||||
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||||||
config CPU_HAS_WB
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config CPU_HAS_WB
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bool "Writeback Buffer available" if CPU_ADVANCED
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bool "Writeback Buffer available" if CPU_ADVANCED
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||||||
default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION
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default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION
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||||||
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@ -93,7 +93,6 @@ endif
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||||||
#
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#
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||||||
cflags-y += -I $(TOPDIR)/include/asm/gcc
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cflags-y += -I $(TOPDIR)/include/asm/gcc
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||||||
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
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cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
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||||||
cflags-y += $(call cc-option, -finline-limit=100000)
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||||||
LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
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LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
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||||||
MODFLAGS += -mlong-calls
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MODFLAGS += -mlong-calls
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||||||
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||||||
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@ -130,7 +130,6 @@ CONFIG_PAGE_SIZE_4KB=y
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||||||
# CONFIG_SIBYTE_DMA_PAGEOPS is not set
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# CONFIG_SIBYTE_DMA_PAGEOPS is not set
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||||||
# CONFIG_MIPS_MT is not set
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# CONFIG_MIPS_MT is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
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||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
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||||||
CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
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|
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@ -115,7 +115,6 @@ CONFIG_PAGE_SIZE_4KB=y
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||||||
# CONFIG_MIPS_MT is not set
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# CONFIG_MIPS_MT is not set
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||||||
# CONFIG_CPU_ADVANCED is not set
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# CONFIG_CPU_ADVANCED is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
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||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
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||||||
CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
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|
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@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y
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||||||
# CONFIG_MIPS_MT is not set
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# CONFIG_MIPS_MT is not set
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||||||
# CONFIG_CPU_ADVANCED is not set
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# CONFIG_CPU_ADVANCED is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
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|
||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
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||||||
CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
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|
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@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y
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||||||
# CONFIG_MIPS_MT is not set
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# CONFIG_MIPS_MT is not set
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||||||
# CONFIG_CPU_ADVANCED is not set
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# CONFIG_CPU_ADVANCED is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
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||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
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||||||
CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
|
|
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@ -118,7 +118,6 @@ CONFIG_PAGE_SIZE_4KB=y
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||||||
# CONFIG_64BIT_PHYS_ADDR is not set
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# CONFIG_64BIT_PHYS_ADDR is not set
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||||||
# CONFIG_CPU_ADVANCED is not set
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# CONFIG_CPU_ADVANCED is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
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|
||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
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||||||
CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
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|
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@ -121,7 +121,6 @@ CONFIG_CPU_HAS_PREFETCH=y
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||||||
# CONFIG_64BIT_PHYS_ADDR is not set
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# CONFIG_64BIT_PHYS_ADDR is not set
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||||||
# CONFIG_CPU_ADVANCED is not set
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# CONFIG_CPU_ADVANCED is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
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||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
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||||||
CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
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|
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@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y
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||||||
# CONFIG_64BIT_PHYS_ADDR is not set
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# CONFIG_64BIT_PHYS_ADDR is not set
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||||||
# CONFIG_CPU_ADVANCED is not set
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# CONFIG_CPU_ADVANCED is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
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|
||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
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||||||
CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
|
|
|
@ -119,7 +119,6 @@ CONFIG_PAGE_SIZE_4KB=y
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||||||
CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_PREFETCH=y
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||||||
# CONFIG_MIPS_MT is not set
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# CONFIG_MIPS_MT is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
|
|
|
@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y
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||||||
CONFIG_RM7000_CPU_SCACHE=y
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CONFIG_RM7000_CPU_SCACHE=y
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||||||
# CONFIG_MIPS_MT is not set
|
# CONFIG_MIPS_MT is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
|
|
|
@ -117,7 +117,6 @@ CONFIG_PAGE_SIZE_4KB=y
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||||||
# CONFIG_MIPS_MT is not set
|
# CONFIG_MIPS_MT is not set
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||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
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||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
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||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
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||||||
CONFIG_GENERIC_IRQ_PROBE=y
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CONFIG_GENERIC_IRQ_PROBE=y
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||||||
|
|
|
@ -114,7 +114,6 @@ CONFIG_PAGE_SIZE_4KB=y
|
||||||
# CONFIG_MIPS_MT is not set
|
# CONFIG_MIPS_MT is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -124,7 +124,6 @@ CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
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||||||
|
|
|
@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
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||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
#
|
#
|
||||||
# Automatically generated make config: don't edit
|
# Automatically generated make config: don't edit
|
||||||
# Linux kernel version: 2.6.15-rc2
|
# Linux kernel version: 2.6.15-rc5
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||||||
# Thu Nov 24 01:06:35 2005
|
# Fri Dec 23 02:21:03 2005
|
||||||
#
|
#
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||||||
CONFIG_MIPS=y
|
CONFIG_MIPS=y
|
||||||
|
|
||||||
|
@ -87,8 +87,8 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
|
||||||
#
|
#
|
||||||
# CPU selection
|
# CPU selection
|
||||||
#
|
#
|
||||||
CONFIG_CPU_MIPS32_R1=y
|
# CONFIG_CPU_MIPS32_R1 is not set
|
||||||
# CONFIG_CPU_MIPS32_R2 is not set
|
CONFIG_CPU_MIPS32_R2=y
|
||||||
# CONFIG_CPU_MIPS64_R1 is not set
|
# CONFIG_CPU_MIPS64_R1 is not set
|
||||||
# CONFIG_CPU_MIPS64_R2 is not set
|
# CONFIG_CPU_MIPS64_R2 is not set
|
||||||
# CONFIG_CPU_R3000 is not set
|
# CONFIG_CPU_R3000 is not set
|
||||||
|
@ -112,7 +112,7 @@ CONFIG_SYS_HAS_CPU_MIPS64_R1=y
|
||||||
CONFIG_SYS_HAS_CPU_NEVADA=y
|
CONFIG_SYS_HAS_CPU_NEVADA=y
|
||||||
CONFIG_SYS_HAS_CPU_RM7000=y
|
CONFIG_SYS_HAS_CPU_RM7000=y
|
||||||
CONFIG_CPU_MIPS32=y
|
CONFIG_CPU_MIPS32=y
|
||||||
CONFIG_CPU_MIPSR1=y
|
CONFIG_CPU_MIPSR2=y
|
||||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||||
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
|
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
|
||||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||||
|
|
|
@ -122,7 +122,6 @@ CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -118,7 +118,6 @@ CONFIG_RM7000_CPU_SCACHE=y
|
||||||
CONFIG_CPU_HAS_PREFETCH=y
|
CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_MIPS_MT is not set
|
# CONFIG_MIPS_MT is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -123,7 +123,6 @@ CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -121,7 +121,6 @@ CONFIG_RM7000_CPU_SCACHE=y
|
||||||
CONFIG_CPU_HAS_PREFETCH=y
|
CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_MIPS_MT is not set
|
# CONFIG_MIPS_MT is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -116,7 +116,6 @@ CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
CONFIG_CPU_ADVANCED=y
|
CONFIG_CPU_ADVANCED=y
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
# CONFIG_CPU_HAS_LLDSCD is not set
|
|
||||||
# CONFIG_CPU_HAS_WB is not set
|
# CONFIG_CPU_HAS_WB is not set
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
|
|
|
@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y
|
||||||
# CONFIG_MIPS_MT is not set
|
# CONFIG_MIPS_MT is not set
|
||||||
CONFIG_CPU_ADVANCED=y
|
CONFIG_CPU_ADVANCED=y
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_WB=y
|
CONFIG_CPU_HAS_WB=y
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
|
|
|
@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -133,7 +133,6 @@ CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_MIPS_MT is not set
|
# CONFIG_MIPS_MT is not set
|
||||||
CONFIG_SB1_PASS_1_WORKAROUNDS=y
|
CONFIG_SB1_PASS_1_WORKAROUNDS=y
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -118,7 +118,6 @@ CONFIG_CPU_HAS_PREFETCH=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y
|
||||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||||
# CONFIG_CPU_ADVANCED is not set
|
# CONFIG_CPU_ADVANCED is not set
|
||||||
CONFIG_CPU_HAS_LLSC=y
|
CONFIG_CPU_HAS_LLSC=y
|
||||||
CONFIG_CPU_HAS_LLDSCD=y
|
|
||||||
CONFIG_CPU_HAS_SYNC=y
|
CONFIG_CPU_HAS_SYNC=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
CONFIG_GENERIC_IRQ_PROBE=y
|
CONFIG_GENERIC_IRQ_PROBE=y
|
||||||
|
|
|
@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static char unknown_isa[] __initdata = KERN_ERR \
|
||||||
|
"Unsupported ISA type, c0.config0: %d.";
|
||||||
|
|
||||||
static inline unsigned int decode_config0(struct cpuinfo_mips *c)
|
static inline unsigned int decode_config0(struct cpuinfo_mips *c)
|
||||||
{
|
{
|
||||||
unsigned int config0;
|
unsigned int config0;
|
||||||
|
@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
|
||||||
isa = (config0 & MIPS_CONF_AT) >> 13;
|
isa = (config0 & MIPS_CONF_AT) >> 13;
|
||||||
switch (isa) {
|
switch (isa) {
|
||||||
case 0:
|
case 0:
|
||||||
c->isa_level = MIPS_CPU_ISA_M32;
|
switch ((config0 >> 10) & 7) {
|
||||||
|
case 0:
|
||||||
|
c->isa_level = MIPS_CPU_ISA_M32R1;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
c->isa_level = MIPS_CPU_ISA_M32R2;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
goto unknown;
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
case 2:
|
case 2:
|
||||||
c->isa_level = MIPS_CPU_ISA_M64;
|
switch ((config0 >> 10) & 7) {
|
||||||
|
case 0:
|
||||||
|
c->isa_level = MIPS_CPU_ISA_M64R1;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
c->isa_level = MIPS_CPU_ISA_M64R2;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
goto unknown;
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
panic("Unsupported ISA type, cp0.config0.at: %d.", isa);
|
goto unknown;
|
||||||
}
|
}
|
||||||
|
|
||||||
return config0 & MIPS_CONF_M;
|
return config0 & MIPS_CONF_M;
|
||||||
|
|
||||||
|
unknown:
|
||||||
|
panic(unknown_isa, config0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline unsigned int decode_config1(struct cpuinfo_mips *c)
|
static inline unsigned int decode_config1(struct cpuinfo_mips *c)
|
||||||
|
@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
|
||||||
break;
|
break;
|
||||||
case PRID_IMP_34K:
|
case PRID_IMP_34K:
|
||||||
c->cputype = CPU_34K;
|
c->cputype = CPU_34K;
|
||||||
c->isa_level = MIPS_CPU_ISA_M32;
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -647,7 +670,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c)
|
||||||
switch (c->processor_id & 0xff00) {
|
switch (c->processor_id & 0xff00) {
|
||||||
case PRID_IMP_PR4450:
|
case PRID_IMP_PR4450:
|
||||||
c->cputype = CPU_PR4450;
|
c->cputype = CPU_PR4450;
|
||||||
c->isa_level = MIPS_CPU_ISA_M32;
|
c->isa_level = MIPS_CPU_ISA_M32R1;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
panic("Unknown Philips Core!"); /* REVISIT: die? */
|
panic("Unknown Philips Core!"); /* REVISIT: die? */
|
||||||
|
@ -690,8 +713,10 @@ __init void cpu_probe(void)
|
||||||
if (c->options & MIPS_CPU_FPU) {
|
if (c->options & MIPS_CPU_FPU) {
|
||||||
c->fpu_id = cpu_get_fpu_id();
|
c->fpu_id = cpu_get_fpu_id();
|
||||||
|
|
||||||
if (c->isa_level == MIPS_CPU_ISA_M32 ||
|
if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
|
||||||
c->isa_level == MIPS_CPU_ISA_M64) {
|
c->isa_level == MIPS_CPU_ISA_M32R2 ||
|
||||||
|
c->isa_level == MIPS_CPU_ISA_M64R1 ||
|
||||||
|
c->isa_level == MIPS_CPU_ISA_M64R2) {
|
||||||
if (c->fpu_id & MIPS_FPIR_3D)
|
if (c->fpu_id & MIPS_FPIR_3D)
|
||||||
c->ases |= MIPS_ASE_MIPS3D;
|
c->ases |= MIPS_ASE_MIPS3D;
|
||||||
}
|
}
|
||||||
|
|
|
@ -205,7 +205,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
|
void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
@ -231,7 +231,7 @@ int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs)
|
||||||
{
|
{
|
||||||
struct thread_info *ti = tsk->thread_info;
|
struct thread_info *ti = tsk->thread_info;
|
||||||
long ksp = (unsigned long)ti + THREAD_SIZE - 32;
|
long ksp = (unsigned long)ti + THREAD_SIZE - 32;
|
||||||
dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1);
|
elf_dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1);
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -280,12 +280,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
||||||
ret = -EIO;
|
ret = -EIO;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
if (child->thread.dsp.used_dsp) {
|
dregs = __get_dsp_regs(child);
|
||||||
dregs = __get_dsp_regs(child);
|
tmp = (unsigned long) (dregs[addr - DSP_BASE]);
|
||||||
tmp = (unsigned long) (dregs[addr - DSP_BASE]);
|
|
||||||
} else {
|
|
||||||
tmp = -1; /* DSP registers yet used */
|
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case DSP_CONTROL:
|
case DSP_CONTROL:
|
||||||
|
|
|
@ -201,12 +201,8 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
|
||||||
ret = -EIO;
|
ret = -EIO;
|
||||||
goto out_tsk;
|
goto out_tsk;
|
||||||
}
|
}
|
||||||
if (child->thread.dsp.used_dsp) {
|
dspreg_t *dregs = __get_dsp_regs(child);
|
||||||
dspreg_t *dregs = __get_dsp_regs(child);
|
tmp = (unsigned long) (dregs[addr - DSP_BASE]);
|
||||||
tmp = (unsigned long) (dregs[addr - DSP_BASE]);
|
|
||||||
} else {
|
|
||||||
tmp = -1; /* DSP registers yet used */
|
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
case DSP_CONTROL:
|
case DSP_CONTROL:
|
||||||
if (!cpu_has_dsp) {
|
if (!cpu_has_dsp) {
|
||||||
|
|
|
@ -588,7 +588,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs,
|
||||||
err |= __put_user(regs->hi, &sc->sc_mdhi);
|
err |= __put_user(regs->hi, &sc->sc_mdhi);
|
||||||
err |= __put_user(regs->lo, &sc->sc_mdlo);
|
err |= __put_user(regs->lo, &sc->sc_mdlo);
|
||||||
if (cpu_has_dsp) {
|
if (cpu_has_dsp) {
|
||||||
err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1);
|
err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
|
||||||
err |= __put_user(mfhi1(), &sc->sc_hi1);
|
err |= __put_user(mfhi1(), &sc->sc_hi1);
|
||||||
err |= __put_user(mflo1(), &sc->sc_lo1);
|
err |= __put_user(mflo1(), &sc->sc_lo1);
|
||||||
err |= __put_user(mfhi2(), &sc->sc_hi2);
|
err |= __put_user(mfhi2(), &sc->sc_hi2);
|
||||||
|
|
|
@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int null_perf_irq(struct pt_regs *regs)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int (*perf_irq)(struct pt_regs *regs) = null_perf_irq;
|
||||||
|
|
||||||
|
EXPORT_SYMBOL(null_perf_irq);
|
||||||
|
EXPORT_SYMBOL(perf_irq);
|
||||||
|
|
||||||
asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
|
asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
|
int r2 = cpu_has_mips_r2;
|
||||||
|
|
||||||
irq_enter();
|
irq_enter();
|
||||||
kstat_this_cpu.irqs[irq]++;
|
kstat_this_cpu.irqs[irq]++;
|
||||||
|
|
||||||
/* we keep interrupt disabled all the time */
|
/*
|
||||||
timer_interrupt(irq, NULL, regs);
|
* Suckage alert:
|
||||||
|
* Before R2 of the architecture there was no way to see if a
|
||||||
|
* performance counter interrupt was pending, so we have to run the
|
||||||
|
* performance counter interrupt handler anyway.
|
||||||
|
*/
|
||||||
|
if (!r2 || (read_c0_cause() & (1 << 26)))
|
||||||
|
if (perf_irq(regs))
|
||||||
|
goto out;
|
||||||
|
|
||||||
|
/* we keep interrupt disabled all the time */
|
||||||
|
if (!r2 || (read_c0_cause() & (1 << 30)))
|
||||||
|
timer_interrupt(irq, NULL, regs);
|
||||||
|
|
||||||
|
out:
|
||||||
irq_exit();
|
irq_exit();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -628,9 +652,9 @@ void __init time_init(void)
|
||||||
mips_hpt_init = c0_hpt_init;
|
mips_hpt_init = c0_hpt_init;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) ||
|
if (cpu_has_mips32r1 || cpu_has_mips32r2 ||
|
||||||
(current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
|
(current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
|
||||||
(current_cpu_data.isa_level == MIPS_CPU_ISA_II))
|
(current_cpu_data.isa_level == MIPS_CPU_ISA_II))
|
||||||
/*
|
/*
|
||||||
* We need to calibrate the counter but we don't have
|
* We need to calibrate the counter but we don't have
|
||||||
* 64-bit division.
|
* 64-bit division.
|
||||||
|
|
|
@ -99,9 +99,9 @@ struct vpe {
|
||||||
|
|
||||||
/* elfloader stuff */
|
/* elfloader stuff */
|
||||||
void *load_addr;
|
void *load_addr;
|
||||||
u32 len;
|
unsigned long len;
|
||||||
char *pbuffer;
|
char *pbuffer;
|
||||||
u32 plen;
|
unsigned long plen;
|
||||||
|
|
||||||
unsigned long __start;
|
unsigned long __start;
|
||||||
|
|
||||||
|
@ -253,11 +253,11 @@ void dump_mtregs(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Find some VPE program space */
|
/* Find some VPE program space */
|
||||||
static void *alloc_progmem(u32 len)
|
static void *alloc_progmem(unsigned long len)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_MIPS_VPE_LOADER_TOM
|
#ifdef CONFIG_MIPS_VPE_LOADER_TOM
|
||||||
/* this means you must tell linux to use less memory than you physically have */
|
/* this means you must tell linux to use less memory than you physically have */
|
||||||
return (void *)((max_pfn * PAGE_SIZE) + KSEG0);
|
return pfn_to_kaddr(max_pfn);
|
||||||
#else
|
#else
|
||||||
// simple grab some mem for now
|
// simple grab some mem for now
|
||||||
return kmalloc(len, GFP_KERNEL);
|
return kmalloc(len, GFP_KERNEL);
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* This code is based on lib/iomap.c, by Linus Torvalds.
|
* This code is based on lib/iomap.c, by Linus Torvalds.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -33,8 +33,6 @@ ieee754dp ieee754dp_fint(int x)
|
||||||
|
|
||||||
CLEARCX;
|
CLEARCX;
|
||||||
|
|
||||||
xc = ( 0 ? xc : xc );
|
|
||||||
|
|
||||||
if (x == 0)
|
if (x == 0)
|
||||||
return ieee754dp_zero(0);
|
return ieee754dp_zero(0);
|
||||||
if (x == 1 || x == -1)
|
if (x == 1 || x == -1)
|
||||||
|
|
|
@ -33,8 +33,6 @@ ieee754dp ieee754dp_flong(s64 x)
|
||||||
|
|
||||||
CLEARCX;
|
CLEARCX;
|
||||||
|
|
||||||
xc = ( 0 ? xc : xc );
|
|
||||||
|
|
||||||
if (x == 0)
|
if (x == 0)
|
||||||
return ieee754dp_zero(0);
|
return ieee754dp_zero(0);
|
||||||
if (x == 1 || x == -1)
|
if (x == 1 || x == -1)
|
||||||
|
|
|
@ -33,8 +33,6 @@ ieee754sp ieee754sp_fint(int x)
|
||||||
|
|
||||||
CLEARCX;
|
CLEARCX;
|
||||||
|
|
||||||
xc = ( 0 ? xc : xc );
|
|
||||||
|
|
||||||
if (x == 0)
|
if (x == 0)
|
||||||
return ieee754sp_zero(0);
|
return ieee754sp_zero(0);
|
||||||
if (x == 1 || x == -1)
|
if (x == 1 || x == -1)
|
||||||
|
|
|
@ -33,8 +33,6 @@ ieee754sp ieee754sp_flong(s64 x)
|
||||||
|
|
||||||
CLEARCX;
|
CLEARCX;
|
||||||
|
|
||||||
xc = ( 0 ? xc : xc );
|
|
||||||
|
|
||||||
if (x == 0)
|
if (x == 0)
|
||||||
return ieee754sp_zero(0);
|
return ieee754sp_zero(0);
|
||||||
if (x == 1 || x == -1)
|
if (x == 1 || x == -1)
|
||||||
|
|
|
@ -75,20 +75,31 @@ static void mips_timer_dispatch (struct pt_regs *regs)
|
||||||
do_IRQ (mips_cpu_timer_irq, regs);
|
do_IRQ (mips_cpu_timer_irq, regs);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
extern int null_perf_irq(struct pt_regs *regs);
|
||||||
|
|
||||||
|
extern int (*perf_irq)(struct pt_regs *regs);
|
||||||
|
|
||||||
irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_SMP
|
int r2 = cpu_has_mips_r2;
|
||||||
int cpu = smp_processor_id();
|
int cpu = smp_processor_id();
|
||||||
|
|
||||||
if (cpu == 0) {
|
if (cpu == 0) {
|
||||||
/*
|
/*
|
||||||
* CPU 0 handles the global timer interrupt job and process accounting
|
* CPU 0 handles the global timer interrupt job and process
|
||||||
* resets count/compare registers to trigger next timer int.
|
* accounting resets count/compare registers to trigger next
|
||||||
|
* timer int.
|
||||||
*/
|
*/
|
||||||
(void) timer_interrupt(irq, dev_id, regs);
|
if (!r2 || (read_c0_cause() & (1 << 26)))
|
||||||
|
if (perf_irq(regs))
|
||||||
|
goto out;
|
||||||
|
|
||||||
|
/* we keep interrupt disabled all the time */
|
||||||
|
if (!r2 || (read_c0_cause() & (1 << 30)))
|
||||||
|
timer_interrupt(irq, NULL, regs);
|
||||||
|
|
||||||
scroll_display_message();
|
scroll_display_message();
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
/* Everyone else needs to reset the timer int here as
|
/* Everyone else needs to reset the timer int here as
|
||||||
ll_local_timer_interrupt doesn't */
|
ll_local_timer_interrupt doesn't */
|
||||||
/*
|
/*
|
||||||
|
@ -103,16 +114,8 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||||
local_timer_interrupt (irq, dev_id, regs);
|
local_timer_interrupt (irq, dev_id, regs);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
out:
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
#else
|
|
||||||
irqreturn_t r;
|
|
||||||
|
|
||||||
r = timer_interrupt(irq, dev_id, regs);
|
|
||||||
|
|
||||||
scroll_display_message();
|
|
||||||
|
|
||||||
return r;
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -1183,8 +1183,8 @@ static void __init setup_scache(void)
|
||||||
if (!sc_present)
|
if (!sc_present)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if ((c->isa_level == MIPS_CPU_ISA_M32 ||
|
if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
|
||||||
c->isa_level == MIPS_CPU_ISA_M64) &&
|
c->isa_level == MIPS_CPU_ISA_M64R1) &&
|
||||||
!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
|
!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
|
||||||
panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
|
panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
|
||||||
|
|
||||||
|
|
|
@ -75,7 +75,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
|
||||||
int res;
|
int res;
|
||||||
|
|
||||||
switch (current_cpu_data.cputype) {
|
switch (current_cpu_data.cputype) {
|
||||||
|
case CPU_5KC:
|
||||||
|
case CPU_20KC:
|
||||||
case CPU_24K:
|
case CPU_24K:
|
||||||
|
case CPU_25KF:
|
||||||
lmodel = &op_model_mipsxx;
|
lmodel = &op_model_mipsxx;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|
|
@ -12,8 +12,8 @@
|
||||||
|
|
||||||
struct pt_regs;
|
struct pt_regs;
|
||||||
|
|
||||||
extern void null_perf_irq(struct pt_regs *regs);
|
extern int null_perf_irq(struct pt_regs *regs);
|
||||||
extern void (*perf_irq)(struct pt_regs *regs);
|
extern int (*perf_irq)(struct pt_regs *regs);
|
||||||
|
|
||||||
/* Per-counter configuration as set via oprofilefs. */
|
/* Per-counter configuration as set via oprofilefs. */
|
||||||
struct op_counter_config {
|
struct op_counter_config {
|
||||||
|
|
|
@ -114,11 +114,12 @@ static void mipsxx_cpu_stop(void *args)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mipsxx_perfcount_handler(struct pt_regs *regs)
|
static int mipsxx_perfcount_handler(struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
unsigned int counters = op_model_mipsxx.num_counters;
|
unsigned int counters = op_model_mipsxx.num_counters;
|
||||||
unsigned int control;
|
unsigned int control;
|
||||||
unsigned int counter;
|
unsigned int counter;
|
||||||
|
int handled = 0;
|
||||||
|
|
||||||
switch (counters) {
|
switch (counters) {
|
||||||
#define HANDLE_COUNTER(n) \
|
#define HANDLE_COUNTER(n) \
|
||||||
|
@ -129,12 +130,15 @@ static void mipsxx_perfcount_handler(struct pt_regs *regs)
|
||||||
(counter & M_COUNTER_OVERFLOW)) { \
|
(counter & M_COUNTER_OVERFLOW)) { \
|
||||||
oprofile_add_sample(regs, n); \
|
oprofile_add_sample(regs, n); \
|
||||||
write_c0_perfcntr ## n(reg.counter[n]); \
|
write_c0_perfcntr ## n(reg.counter[n]); \
|
||||||
|
handled = 1; \
|
||||||
}
|
}
|
||||||
HANDLE_COUNTER(3)
|
HANDLE_COUNTER(3)
|
||||||
HANDLE_COUNTER(2)
|
HANDLE_COUNTER(2)
|
||||||
HANDLE_COUNTER(1)
|
HANDLE_COUNTER(1)
|
||||||
HANDLE_COUNTER(0)
|
HANDLE_COUNTER(0)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return handled;
|
||||||
}
|
}
|
||||||
|
|
||||||
#define M_CONFIG1_PC (1 << 4)
|
#define M_CONFIG1_PC (1 << 4)
|
||||||
|
@ -176,17 +180,31 @@ static int __init mipsxx_init(void)
|
||||||
int counters;
|
int counters;
|
||||||
|
|
||||||
counters = n_counters();
|
counters = n_counters();
|
||||||
if (counters == 0)
|
if (counters == 0) {
|
||||||
|
printk(KERN_ERR "Oprofile: CPU has no performance counters\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
reset_counters(counters);
|
reset_counters(counters);
|
||||||
|
|
||||||
op_model_mipsxx.num_counters = counters;
|
op_model_mipsxx.num_counters = counters;
|
||||||
switch (current_cpu_data.cputype) {
|
switch (current_cpu_data.cputype) {
|
||||||
|
case CPU_20KC:
|
||||||
|
op_model_mipsxx.cpu_type = "mips/20K";
|
||||||
|
break;
|
||||||
|
|
||||||
case CPU_24K:
|
case CPU_24K:
|
||||||
op_model_mipsxx.cpu_type = "mips/24K";
|
op_model_mipsxx.cpu_type = "mips/24K";
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case CPU_25KF:
|
||||||
|
op_model_mipsxx.cpu_type = "mips/25K";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case CPU_5KC:
|
||||||
|
op_model_mipsxx.cpu_type = "mips/5K";
|
||||||
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
printk(KERN_ERR "Profiling unsupported for this CPU\n");
|
printk(KERN_ERR "Profiling unsupported for this CPU\n");
|
||||||
|
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups.
|
* fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups.
|
* fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -2,7 +2,7 @@
|
||||||
* fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups.
|
* fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
|
* Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
|
||||||
* Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
|
* fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups.
|
* fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2001-2003 MontaVista Software Inc.
|
* Copyright (C) 2001-2003 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
||||||
* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2001-2003 MontaVista Software Inc.
|
* Copyright (C) 2001-2003 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
||||||
* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
|
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002 MontaVista Software Inc.
|
* Copyright (C) 2002 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
||||||
* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
|
* setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002 MontaVista Software Inc.
|
* Copyright (C) 2002 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
@ -25,7 +25,7 @@
|
||||||
* - New creation, NEC VR4122 and VR4131 are supported.
|
* - New creation, NEC VR4122 and VR4131 are supported.
|
||||||
* - Added support for NEC VR4111 and VR4121.
|
* - Added support for NEC VR4111 and VR4121.
|
||||||
*
|
*
|
||||||
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
* - Added support for NEC VR4133.
|
* - Added support for NEC VR4133.
|
||||||
*/
|
*/
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2001-2002 MontaVista Software Inc.
|
* Copyright (C) 2001-2002 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
||||||
* Copuright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copuright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
@ -25,7 +25,7 @@
|
||||||
* - New creation, NEC VR4122 and VR4131 are supported.
|
* - New creation, NEC VR4122 and VR4131 are supported.
|
||||||
* - Added support for NEC VR4111 and VR4121.
|
* - Added support for NEC VR4111 and VR4121.
|
||||||
*
|
*
|
||||||
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
* - Added support for NEC VR4133.
|
* - Added support for NEC VR4133.
|
||||||
*/
|
*/
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2001-2002 MontaVista Software Inc.
|
* Copyright (C) 2001-2002 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
@ -25,7 +25,7 @@
|
||||||
* - New creation, NEC VR4122 and VR4131 are supported.
|
* - New creation, NEC VR4122 and VR4131 are supported.
|
||||||
* - Added support for NEC VR4111 and VR4121.
|
* - Added support for NEC VR4111 and VR4121.
|
||||||
*
|
*
|
||||||
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
* - Coped with INTASSIGN of NEC VR4133.
|
* - Coped with INTASSIGN of NEC VR4133.
|
||||||
*/
|
*/
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* init.c, Common initialization routines for NEC VR4100 series.
|
* init.c, Common initialization routines for NEC VR4100 series.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -35,7 +35,7 @@
|
||||||
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
|
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
|
||||||
* - New creation, NEC VR4100 series are supported.
|
* - New creation, NEC VR4100 series are supported.
|
||||||
*
|
*
|
||||||
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
* - Coped with INTASSIGN of NEC VR4133.
|
* - Coped with INTASSIGN of NEC VR4133.
|
||||||
*/
|
*/
|
||||||
#include <asm/asm.h>
|
#include <asm/asm.h>
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Interrupt handing routines for NEC VR4100 series.
|
* Interrupt handing routines for NEC VR4100 series.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* pmu.c, Power Management Unit routines for NEC VR4100 series.
|
* pmu.c, Power Management Unit routines for NEC VR4100 series.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* type.c, System type for NEC VR4100 series.
|
* type.c, System type for NEC VR4100 series.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2001-2003 MontaVista Software Inc.
|
* Copyright (C) 2001-2003 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
|
||||||
* Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
|
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* setup.c, Setup for the IBM WorkPad z50.
|
* setup.c, Setup for the IBM WorkPad z50.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Driver for TANBAC TB0219 base board.
|
* Driver for TANBAC TB0219 base board.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
@ -27,7 +27,7 @@
|
||||||
#include <asm/vr41xx/giu.h>
|
#include <asm/vr41xx/giu.h>
|
||||||
#include <asm/vr41xx/tb0219.h>
|
#include <asm/vr41xx/tb0219.h>
|
||||||
|
|
||||||
MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
|
MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
|
||||||
MODULE_DESCRIPTION("TANBAC TB0219 base board driver");
|
MODULE_DESCRIPTION("TANBAC TB0219 base board driver");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002 MontaVista Software Inc.
|
* Copyright (C) 2002 MontaVista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
@ -35,7 +35,7 @@
|
||||||
#include <asm/vr41xx/giu.h>
|
#include <asm/vr41xx/giu.h>
|
||||||
#include <asm/vr41xx/vr41xx.h>
|
#include <asm/vr41xx/vr41xx.h>
|
||||||
|
|
||||||
MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
|
MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
|
||||||
MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver");
|
MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Driver for NEC VR4100 series Real Time Clock unit.
|
* Driver for NEC VR4100 series Real Time Clock unit.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
@ -37,7 +37,7 @@
|
||||||
#include <asm/uaccess.h>
|
#include <asm/uaccess.h>
|
||||||
#include <asm/vr41xx/vr41xx.h>
|
#include <asm/vr41xx/vr41xx.h>
|
||||||
|
|
||||||
MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
|
MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
|
||||||
MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
|
MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
|
* vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
@ -33,7 +33,7 @@
|
||||||
#include "i82365.h"
|
#include "i82365.h"
|
||||||
|
|
||||||
MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
|
MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
|
||||||
MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
|
MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
|
||||||
#define CARD_MAX_SLOTS 2
|
#define CARD_MAX_SLOTS 2
|
||||||
|
|
|
@ -6,7 +6,7 @@
|
||||||
* NEC VRC4173 CARDU driver for Socket Services
|
* NEC VRC4173 CARDU driver for Socket Services
|
||||||
* (This device doesn't support CardBus. it is supporting only 16bit PC Card.)
|
* (This device doesn't support CardBus. it is supporting only 16bit PC Card.)
|
||||||
*
|
*
|
||||||
* Copyright 2002,2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright 2002,2003 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms of the GNU General Public License as published by the
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
@ -41,7 +41,7 @@
|
||||||
#include "vrc4173_cardu.h"
|
#include "vrc4173_cardu.h"
|
||||||
|
|
||||||
MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services");
|
MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services");
|
||||||
MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
|
MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
|
||||||
static int vrc4173_cardu_slots;
|
static int vrc4173_cardu_slots;
|
||||||
|
|
|
@ -5,7 +5,7 @@
|
||||||
* BRIEF MODULE DESCRIPTION
|
* BRIEF MODULE DESCRIPTION
|
||||||
* Include file for NEC VRC4173 CARDU.
|
* Include file for NEC VRC4173 CARDU.
|
||||||
*
|
*
|
||||||
* Copyright 2002 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright 2002 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms of the GNU General Public License as published by the
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Driver for NEC VR4100 series Serial Interface Unit.
|
* Driver for NEC VR4100 series Serial Interface Unit.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* Based on drivers/serial/8250.c, by Russell King.
|
* Based on drivers/serial/8250.c, by Russell King.
|
||||||
*
|
*
|
||||||
|
|
|
@ -24,10 +24,9 @@
|
||||||
#define _ASM_ATOMIC_H
|
#define _ASM_ATOMIC_H
|
||||||
|
|
||||||
#include <asm/cpu-features.h>
|
#include <asm/cpu-features.h>
|
||||||
|
#include <asm/interrupt.h>
|
||||||
#include <asm/war.h>
|
#include <asm/war.h>
|
||||||
|
|
||||||
extern spinlock_t atomic_lock;
|
|
||||||
|
|
||||||
typedef struct { volatile int counter; } atomic_t;
|
typedef struct { volatile int counter; } atomic_t;
|
||||||
|
|
||||||
#define ATOMIC_INIT(i) { (i) }
|
#define ATOMIC_INIT(i) { (i) }
|
||||||
|
@ -85,9 +84,9 @@ static __inline__ void atomic_add(int i, atomic_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
v->counter += i;
|
v->counter += i;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -127,9 +126,9 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
v->counter -= i;
|
v->counter -= i;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -173,11 +172,11 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
result = v->counter;
|
result = v->counter;
|
||||||
result += i;
|
result += i;
|
||||||
v->counter = result;
|
v->counter = result;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
|
@ -220,11 +219,11 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
result = v->counter;
|
result = v->counter;
|
||||||
result -= i;
|
result -= i;
|
||||||
v->counter = result;
|
v->counter = result;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
|
@ -277,12 +276,12 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
result = v->counter;
|
result = v->counter;
|
||||||
result -= i;
|
result -= i;
|
||||||
if (result >= 0)
|
if (result >= 0)
|
||||||
v->counter = result;
|
v->counter = result;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
|
@ -433,9 +432,9 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
v->counter += i;
|
v->counter += i;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -475,9 +474,9 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
v->counter -= i;
|
v->counter -= i;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -521,11 +520,11 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
result = v->counter;
|
result = v->counter;
|
||||||
result += i;
|
result += i;
|
||||||
v->counter = result;
|
v->counter = result;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
|
@ -568,11 +567,11 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
result = v->counter;
|
result = v->counter;
|
||||||
result -= i;
|
result -= i;
|
||||||
v->counter = result;
|
v->counter = result;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
|
@ -625,12 +624,12 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
|
||||||
} else {
|
} else {
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&atomic_lock, flags);
|
local_irq_save(flags);
|
||||||
result = v->counter;
|
result = v->counter;
|
||||||
result -= i;
|
result -= i;
|
||||||
if (result >= 0)
|
if (result >= 0)
|
||||||
v->counter = result;
|
v->counter = result;
|
||||||
spin_unlock_irqrestore(&atomic_lock, flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
|
|
|
@ -116,6 +116,27 @@
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
# ifndef cpu_has_mips32r1
|
||||||
|
# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
|
||||||
|
# endif
|
||||||
|
# ifndef cpu_has_mips32r2
|
||||||
|
# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
|
||||||
|
# endif
|
||||||
|
# ifndef cpu_has_mips64r1
|
||||||
|
# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
|
||||||
|
# endif
|
||||||
|
# ifndef cpu_has_mips64r2
|
||||||
|
# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Shortcuts ...
|
||||||
|
*/
|
||||||
|
#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2)
|
||||||
|
#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2)
|
||||||
|
#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1)
|
||||||
|
#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2)
|
||||||
|
|
||||||
#ifndef cpu_has_dsp
|
#ifndef cpu_has_dsp
|
||||||
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
|
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -204,16 +204,18 @@
|
||||||
*/
|
*/
|
||||||
#define MIPS_CPU_ISA_I 0x00000001
|
#define MIPS_CPU_ISA_I 0x00000001
|
||||||
#define MIPS_CPU_ISA_II 0x00000002
|
#define MIPS_CPU_ISA_II 0x00000002
|
||||||
#define MIPS_CPU_ISA_III 0x00008003
|
#define MIPS_CPU_ISA_III 0x00000003
|
||||||
#define MIPS_CPU_ISA_IV 0x00008004
|
#define MIPS_CPU_ISA_IV 0x00000004
|
||||||
#define MIPS_CPU_ISA_V 0x00008005
|
#define MIPS_CPU_ISA_V 0x00000005
|
||||||
#define MIPS_CPU_ISA_M32 0x00000020
|
#define MIPS_CPU_ISA_M32R1 0x00000020
|
||||||
#define MIPS_CPU_ISA_M64 0x00008040
|
#define MIPS_CPU_ISA_M32R2 0x00000040
|
||||||
|
#define MIPS_CPU_ISA_M64R1 0x00000080
|
||||||
|
#define MIPS_CPU_ISA_M64R2 0x00000100
|
||||||
|
|
||||||
/*
|
#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \
|
||||||
* Bit 15 encodes if an ISA level supports 64-bit operations.
|
MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 )
|
||||||
*/
|
#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
|
||||||
#define MIPS_CPU_ISA_64BIT 0x00008000
|
MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CPU Option encodings
|
* CPU Option encodings
|
||||||
|
|
|
@ -52,13 +52,11 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
|
||||||
unsigned long lo;
|
unsigned long lo;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* The common rates of 1000 and 128 are rounded wrongly by the
|
* The rates of 128 is rounded wrongly by the catchall case
|
||||||
* catchall case for 64-bit. Excessive precission? Probably ...
|
* for 64-bit. Excessive precission? Probably ...
|
||||||
*/
|
*/
|
||||||
#if defined(CONFIG_64BIT) && (HZ == 128)
|
#if defined(CONFIG_64BIT) && (HZ == 128)
|
||||||
usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
|
usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
|
||||||
#elif defined(CONFIG_64BIT) && (HZ == 1000)
|
|
||||||
usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */
|
|
||||||
#elif defined(CONFIG_64BIT)
|
#elif defined(CONFIG_64BIT)
|
||||||
usecs *= (0x8000000000000000UL / (500000 / HZ));
|
usecs *= (0x8000000000000000UL / (500000 / HZ));
|
||||||
#else /* 32-bit junk follows here */
|
#else /* 32-bit junk follows here */
|
||||||
|
|
|
@ -16,7 +16,7 @@
|
||||||
#include <asm/mipsregs.h>
|
#include <asm/mipsregs.h>
|
||||||
|
|
||||||
#define DSP_DEFAULT 0x00000000
|
#define DSP_DEFAULT 0x00000000
|
||||||
#define DSP_MASK 0x1f
|
#define DSP_MASK 0x3ff
|
||||||
|
|
||||||
#define __enable_dsp_hazard() \
|
#define __enable_dsp_hazard() \
|
||||||
do { \
|
do { \
|
||||||
|
@ -48,6 +48,7 @@ do { \
|
||||||
tsk->thread.dsp.dspr[3] = mflo2(); \
|
tsk->thread.dsp.dspr[3] = mflo2(); \
|
||||||
tsk->thread.dsp.dspr[4] = mfhi3(); \
|
tsk->thread.dsp.dspr[4] = mfhi3(); \
|
||||||
tsk->thread.dsp.dspr[5] = mflo3(); \
|
tsk->thread.dsp.dspr[5] = mflo3(); \
|
||||||
|
tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#define save_dsp(tsk) \
|
#define save_dsp(tsk) \
|
||||||
|
@ -64,6 +65,7 @@ do { \
|
||||||
mtlo2(tsk->thread.dsp.dspr[3]); \
|
mtlo2(tsk->thread.dsp.dspr[3]); \
|
||||||
mthi3(tsk->thread.dsp.dspr[4]); \
|
mthi3(tsk->thread.dsp.dspr[4]); \
|
||||||
mtlo3(tsk->thread.dsp.dspr[5]); \
|
mtlo3(tsk->thread.dsp.dspr[5]); \
|
||||||
|
wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#define restore_dsp(tsk) \
|
#define restore_dsp(tsk) \
|
||||||
|
|
|
@ -277,12 +277,12 @@ do { \
|
||||||
|
|
||||||
struct task_struct;
|
struct task_struct;
|
||||||
|
|
||||||
extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
|
extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
|
||||||
extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
|
extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
|
||||||
extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
|
extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
|
||||||
|
|
||||||
#define ELF_CORE_COPY_REGS(elf_regs, regs) \
|
#define ELF_CORE_COPY_REGS(elf_regs, regs) \
|
||||||
dump_regs((elf_greg_t *)&(elf_regs), regs);
|
elf_dump_regs((elf_greg_t *)&(elf_regs), regs);
|
||||||
#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
|
#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
|
||||||
#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
|
#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
|
||||||
dump_task_fpu(tsk, elf_fpregs)
|
dump_task_fpu(tsk, elf_fpregs)
|
||||||
|
|
|
@ -233,15 +233,25 @@ __asm__(
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_CPU_MIPSR2
|
#ifdef CONFIG_CPU_MIPSR2
|
||||||
|
/*
|
||||||
|
* gcc has a tradition of misscompiling the previous construct using the
|
||||||
|
* address of a label as argument to inline assembler. Gas otoh has the
|
||||||
|
* annoying difference between la and dla which are only usable for 32-bit
|
||||||
|
* rsp. 64-bit code, so can't be used without conditional compilation.
|
||||||
|
* The alterantive is switching the assembler to 64-bit code which happens
|
||||||
|
* to work right even for 32-bit code ...
|
||||||
|
*/
|
||||||
#define instruction_hazard() \
|
#define instruction_hazard() \
|
||||||
do { \
|
do { \
|
||||||
__label__ __next; \
|
unsigned long tmp; \
|
||||||
|
\
|
||||||
__asm__ __volatile__( \
|
__asm__ __volatile__( \
|
||||||
|
" .set mips64r2 \n" \
|
||||||
|
" dla %0, 1f \n" \
|
||||||
" jr.hb %0 \n" \
|
" jr.hb %0 \n" \
|
||||||
: \
|
" .set mips0 \n" \
|
||||||
: "r" (&&__next)); \
|
"1: \n" \
|
||||||
__next: \
|
: "=r" (tmp)); \
|
||||||
; \
|
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -93,6 +93,7 @@ __asm__ (
|
||||||
" .set noat \n"
|
" .set noat \n"
|
||||||
#ifdef CONFIG_CPU_MIPSR2
|
#ifdef CONFIG_CPU_MIPSR2
|
||||||
" di \\result \n"
|
" di \\result \n"
|
||||||
|
" andi \\result, 1 \n"
|
||||||
#else
|
#else
|
||||||
" mfc0 \\result, $12 \n"
|
" mfc0 \\result, $12 \n"
|
||||||
" ori $1, \\result, 1 \n"
|
" ori $1, \\result, 1 \n"
|
||||||
|
|
|
@ -838,6 +838,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
|
||||||
#define UART3_ADDR 0xB1400000
|
#define UART3_ADDR 0xB1400000
|
||||||
|
|
||||||
#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
|
#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
|
||||||
|
#define USB_OHCI_LEN 0x00060000
|
||||||
#define USB_HOST_CONFIG 0xB4027ffc
|
#define USB_HOST_CONFIG 0xB4027ffc
|
||||||
|
|
||||||
#define AU1550_ETH0_BASE 0xB0500000
|
#define AU1550_ETH0_BASE 0xB0500000
|
||||||
|
@ -1017,10 +1018,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
|
||||||
#define I2S_CONTROL_D (1<<1)
|
#define I2S_CONTROL_D (1<<1)
|
||||||
#define I2S_CONTROL_CE (1<<0)
|
#define I2S_CONTROL_CE (1<<0)
|
||||||
|
|
||||||
#ifndef CONFIG_SOC_AU1200
|
|
||||||
|
|
||||||
/* USB Host Controller */
|
/* USB Host Controller */
|
||||||
|
#ifndef USB_OHCI_LEN
|
||||||
#define USB_OHCI_LEN 0x00100000
|
#define USB_OHCI_LEN 0x00100000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CONFIG_SOC_AU1200
|
||||||
|
|
||||||
/* USB Device Controller */
|
/* USB Device Controller */
|
||||||
#define USBD_EP0RD 0xB0200000
|
#define USBD_EP0RD 0xB0200000
|
||||||
|
|
|
@ -34,4 +34,9 @@
|
||||||
#define cpu_has_nofpuex 0
|
#define cpu_has_nofpuex 0
|
||||||
#define cpu_has_64bits 1
|
#define cpu_has_64bits 1
|
||||||
|
|
||||||
|
#define cpu_has_mips32r1 0
|
||||||
|
#define cpu_has_mips32r2 0
|
||||||
|
#define cpu_has_mips64r1 0
|
||||||
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */
|
#endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */
|
||||||
|
|
|
@ -37,4 +37,9 @@
|
||||||
#define cpu_icache_line_size() 64
|
#define cpu_icache_line_size() 64
|
||||||
#define cpu_scache_line_size() 128
|
#define cpu_scache_line_size() 128
|
||||||
|
|
||||||
|
#define cpu_has_mips32r1 0
|
||||||
|
#define cpu_has_mips32r2 0
|
||||||
|
#define cpu_has_mips64r1 0
|
||||||
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */
|
#endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */
|
||||||
|
|
|
@ -39,4 +39,9 @@
|
||||||
#define cpu_has_ic_fills_f_dc 0
|
#define cpu_has_ic_fills_f_dc 0
|
||||||
#define cpu_has_dsp 0
|
#define cpu_has_dsp 0
|
||||||
|
|
||||||
|
#define cpu_has_mips32r1 0
|
||||||
|
#define cpu_has_mips32r2 0
|
||||||
|
#define cpu_has_mips64r1 0
|
||||||
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */
|
#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */
|
||||||
|
|
|
@ -37,4 +37,9 @@
|
||||||
#define cpu_icache_line_size() 32
|
#define cpu_icache_line_size() 32
|
||||||
#define cpu_scache_line_size() 32
|
#define cpu_scache_line_size() 32
|
||||||
|
|
||||||
|
#define cpu_has_mips32r1 0
|
||||||
|
#define cpu_has_mips32r2 0
|
||||||
|
#define cpu_has_mips64r1 0
|
||||||
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
|
#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
|
||||||
|
|
|
@ -40,4 +40,9 @@
|
||||||
#define cpu_icache_line_size() 32
|
#define cpu_icache_line_size() 32
|
||||||
#define cpu_scache_line_size() 32
|
#define cpu_scache_line_size() 32
|
||||||
|
|
||||||
|
#define cpu_has_mips32r1 0
|
||||||
|
#define cpu_has_mips32r2 0
|
||||||
|
#define cpu_has_mips64r1 0
|
||||||
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
|
#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
|
||||||
|
|
|
@ -40,4 +40,9 @@
|
||||||
#define cpu_icache_line_size() 32
|
#define cpu_icache_line_size() 32
|
||||||
#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */
|
#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */
|
||||||
|
|
||||||
|
#define cpu_has_mips32r1 0
|
||||||
|
#define cpu_has_mips32r2 0
|
||||||
|
#define cpu_has_mips64r1 0
|
||||||
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */
|
#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */
|
||||||
|
|
|
@ -37,4 +37,9 @@
|
||||||
#define cpu_icache_line_size() 32
|
#define cpu_icache_line_size() 32
|
||||||
#define cpu_scache_line_size() 32
|
#define cpu_scache_line_size() 32
|
||||||
|
|
||||||
|
#define cpu_has_mips32r1 0
|
||||||
|
#define cpu_has_mips32r2 0
|
||||||
|
#define cpu_has_mips64r1 0
|
||||||
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */
|
#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */
|
||||||
|
|
|
@ -1059,7 +1059,7 @@ do { \
|
||||||
" .set noat \n" \
|
" .set noat \n" \
|
||||||
" move $1, %0 \n" \
|
" move $1, %0 \n" \
|
||||||
" # wrdsp $1, %x1 \n" \
|
" # wrdsp $1, %x1 \n" \
|
||||||
" .word 0x7c2004f8 | (%x1 << 15) \n" \
|
" .word 0x7c2004f8 | (%x1 << 11) \n" \
|
||||||
" .set pop \n" \
|
" .set pop \n" \
|
||||||
: \
|
: \
|
||||||
: "r" (val), "i" (mask)); \
|
: "r" (val), "i" (mask)); \
|
||||||
|
|
|
@ -103,7 +103,6 @@ typedef __u32 dspreg_t;
|
||||||
struct mips_dsp_state {
|
struct mips_dsp_state {
|
||||||
dspreg_t dspr[NUM_DSP_REGS];
|
dspreg_t dspr[NUM_DSP_REGS];
|
||||||
unsigned int dspcontrol;
|
unsigned int dspcontrol;
|
||||||
unsigned short used_dsp;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
#define INIT_DSP {{0,},}
|
#define INIT_DSP {{0,},}
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* capcella.h, Include file for ZAO Networks Capcella.
|
* capcella.h, Include file for ZAO Networks Capcella.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65.
|
* e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Include file for NEC VR4100 series General-purpose I/O Unit.
|
* Include file for NEC VR4100 series General-purpose I/O Unit.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* mpc30x.h, Include file for Victor MP-C303/304.
|
* mpc30x.h, Include file for Victor MP-C303/304.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Include file for NEC VR4100 series PCI Control Unit.
|
* Include file for NEC VR4100 series PCI Control Unit.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Include file for NEC VR4100 series Serial Interface Unit.
|
* Include file for NEC VR4100 series Serial Interface Unit.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* tb0219.h, Include file for TANBAC TB0219.
|
* tb0219.h, Include file for TANBAC TB0219.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* Modified for TANBAC TB0219:
|
* Modified for TANBAC TB0219:
|
||||||
* Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
|
* Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* tb0226.h, Include file for TANBAC TB0226.
|
* tb0226.h, Include file for TANBAC TB0226.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
|
@ -7,7 +7,7 @@
|
||||||
* Copyright (C) 2001, 2002 Paul Mundt
|
* Copyright (C) 2001, 2002 Paul Mundt
|
||||||
* Copyright (C) 2002 MontaVista Software, Inc.
|
* Copyright (C) 2002 MontaVista Software, Inc.
|
||||||
* Copyright (C) 2002 TimeSys Corp.
|
* Copyright (C) 2002 TimeSys Corp.
|
||||||
* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms of the GNU General Public License as published by the
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
|
|
@ -4,7 +4,7 @@
|
||||||
* Copyright (C) 2000 Michael R. McDonald
|
* Copyright (C) 2000 Michael R. McDonald
|
||||||
* Copyright (C) 2001-2003 Montavista Software Inc.
|
* Copyright (C) 2001-2003 Montavista Software Inc.
|
||||||
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
|
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
|
||||||
* Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
|
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* workpad.h, Include file for IBM WorkPad z50.
|
* workpad.h, Include file for IBM WorkPad z50.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
|
* Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
|
Loading…
Reference in a new issue