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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
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OMAP4: UART: Add uart1-4 hwmods data for omap4
Add uart1-4 hwmod data into omap4_hwmod data file. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Benoit Cousson
Kevin Hilman
parent
26428b5c4f
commit
db12ba53fe
1 changed files with 235 additions and 0 deletions
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@ -452,6 +452,235 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/*
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* 'uart' class
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* universal asynchronous receiver/transmitter (uart)
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_uart_sysc = {
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.rev_offs = 0x0050,
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.sysc_offs = 0x0054,
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.syss_offs = 0x0058,
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.sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_uart_hwmod_class = {
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.name = "uart",
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.sysc = &omap44xx_uart_sysc,
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};
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/* uart1 */
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static struct omap_hwmod omap44xx_uart1_hwmod;
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static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {
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{ .irq = 72 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {
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{
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.pa_start = 0x4806a000,
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.pa_end = 0x4806a0ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> uart1 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_uart1_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_uart1_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* uart1 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {
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&omap44xx_l4_per__uart1,
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};
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static struct omap_hwmod omap44xx_uart1_hwmod = {
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.name = "uart1",
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.class = &omap44xx_uart_hwmod_class,
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.mpu_irqs = omap44xx_uart1_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs),
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.sdma_reqs = omap44xx_uart1_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs),
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.main_clk = "uart1_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL,
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},
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},
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.slaves = omap44xx_uart1_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_uart1_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/* uart2 */
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static struct omap_hwmod omap44xx_uart2_hwmod;
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static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {
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{ .irq = 73 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {
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{
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.pa_start = 0x4806c000,
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.pa_end = 0x4806c0ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> uart2 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_uart2_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_uart2_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* uart2 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {
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&omap44xx_l4_per__uart2,
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};
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static struct omap_hwmod omap44xx_uart2_hwmod = {
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.name = "uart2",
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.class = &omap44xx_uart_hwmod_class,
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.mpu_irqs = omap44xx_uart2_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs),
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.sdma_reqs = omap44xx_uart2_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs),
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.main_clk = "uart2_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL,
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},
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},
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.slaves = omap44xx_uart2_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_uart2_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/* uart3 */
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static struct omap_hwmod omap44xx_uart3_hwmod;
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static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {
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{ .irq = 74 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {
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{
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.pa_start = 0x48020000,
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.pa_end = 0x480200ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> uart3 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_uart3_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_uart3_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* uart3 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
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&omap44xx_l4_per__uart3,
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};
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static struct omap_hwmod omap44xx_uart3_hwmod = {
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.name = "uart3",
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.class = &omap44xx_uart_hwmod_class,
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.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
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.mpu_irqs = omap44xx_uart3_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs),
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.sdma_reqs = omap44xx_uart3_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs),
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.main_clk = "uart3_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL,
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},
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},
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.slaves = omap44xx_uart3_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_uart3_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/* uart4 */
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static struct omap_hwmod omap44xx_uart4_hwmod;
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static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {
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{ .irq = 70 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {
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{
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.pa_start = 0x4806e000,
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.pa_end = 0x4806e0ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> uart4 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_uart4_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_uart4_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* uart4 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {
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&omap44xx_l4_per__uart4,
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};
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static struct omap_hwmod omap44xx_uart4_hwmod = {
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.name = "uart4",
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.class = &omap44xx_uart_hwmod_class,
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.mpu_irqs = omap44xx_uart4_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs),
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.sdma_reqs = omap44xx_uart4_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs),
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.main_clk = "uart4_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL,
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},
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},
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.slaves = omap44xx_uart4_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_uart4_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
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/* dmm class */
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&omap44xx_dmm_hwmod,
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@ -472,6 +701,12 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
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/* mpu class */
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&omap44xx_mpu_hwmod,
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/* uart class */
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&omap44xx_uart1_hwmod,
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&omap44xx_uart2_hwmod,
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&omap44xx_uart3_hwmod,
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&omap44xx_uart4_hwmod,
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NULL,
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};
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