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ASoC: wcd_cpe_core: Improve exception error handling
CPE (Codec Processing Engine) block in the hardware has multiple exception interrupts. When CPE crashes, it is possible it will generate multiple and spurious exception interrupts. This is causing some interrupts to be missed. Fix this by making sure interrupts that are serviced are masked to avoid spurious interrupts and pending interrupts are serviced to avoid missing interrupts. CRs-fixed: 874196 Change-Id: I63f3ef2eac3f194d5e535c607893236d3ae6a4ab Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
This commit is contained in:
parent
8a995b66eb
commit
f08ff54ccb
1 changed files with 59 additions and 19 deletions
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@ -1069,23 +1069,46 @@ static irqreturn_t svass_exception_irq(int irq, void *data)
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struct wcd_cpe_core *core = data;
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struct wcd_cpe_core *core = data;
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u8 status = 0;
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u8 status = 0;
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if (CPE_ERR_IRQ_CB(core))
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if (!core || !CPE_ERR_IRQ_CB(core)) {
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core->cpe_cdc_cb->cpe_err_irq_control(
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pr_err("%s: Invalid %s\n",
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core->codec,
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__func__,
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CPE_ERR_IRQ_STATUS,
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(!core) ? "core" : "cdc control");
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&status);
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return IRQ_HANDLED;
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dev_err(core->dev,
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}
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"%s: err_interrupt status = 0x%x\n",
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__func__, status);
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if (status & core->irq_info.cpe_fatal_irqs) {
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core->cpe_cdc_cb->cpe_err_irq_control(core->codec,
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wcd_cpe_ssr_event(core, WCD_CPE_SSR_EVENT);
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CPE_ERR_IRQ_STATUS, &status);
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} else {
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/* Make sure all error interrupts are cleared */
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while (status != 0) {
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if (CPE_ERR_IRQ_CB(core))
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if (status & core->irq_info.cpe_fatal_irqs) {
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core->cpe_cdc_cb->cpe_err_irq_control(
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dev_err(core->dev,
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core->codec,
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"%s: CPE SSR event,err_status = 0x%02x\n",
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CPE_ERR_IRQ_CLEAR, NULL);
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__func__, status);
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wcd_cpe_ssr_event(core, WCD_CPE_SSR_EVENT);
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/*
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* If fatal interrupt is received,
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* trigger SSR and stop processing
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* further interrupts
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*/
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break;
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}
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/*
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* Mask the interrupt that was raised to
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* avoid spurious interrupts
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*/
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core->cpe_cdc_cb->cpe_err_irq_control(core->codec,
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CPE_ERR_IRQ_MASK, &status);
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/* Clear only the interrupt that was raised */
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core->cpe_cdc_cb->cpe_err_irq_control(core->codec,
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CPE_ERR_IRQ_CLEAR, &status);
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dev_err(core->dev,
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"%s: err_interrupt status = 0x%x\n",
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__func__, status);
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/* Read status for pending interrupts */
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core->cpe_cdc_cb->cpe_err_irq_control(core->codec,
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CPE_ERR_IRQ_STATUS, &status);
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}
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}
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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@ -2902,6 +2925,7 @@ static int wcd_cpe_lab_ch_setup(void *core_handle,
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struct wcd_cpe_core *core = core_handle;
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struct wcd_cpe_core *core = core_handle;
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struct snd_soc_codec *codec;
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struct snd_soc_codec *codec;
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int rc = 0;
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int rc = 0;
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u8 cpe_intr_bits;
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if (!core || !core->codec) {
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if (!core || !core->codec) {
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pr_err("%s: Invalid handle to %s\n",
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pr_err("%s: Invalid handle to %s\n",
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@ -2956,6 +2980,17 @@ static int wcd_cpe_lab_ch_setup(void *core_handle,
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break;
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break;
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case WCD_CPE_PRE_DISABLE:
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case WCD_CPE_PRE_DISABLE:
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/*
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* Mask the non-fatal interrupts in CPE as they will
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* be generated during lab teardown and may flood.
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*/
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cpe_intr_bits = ~(core->irq_info.cpe_fatal_irqs & 0xFF);
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if (CPE_ERR_IRQ_CB(core))
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core->cpe_cdc_cb->cpe_err_irq_control(
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core->codec,
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CPE_ERR_IRQ_MASK,
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&cpe_intr_bits);
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rc = core->cpe_cdc_cb->lab_cdc_ch_ctl(codec,
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rc = core->cpe_cdc_cb->lab_cdc_ch_ctl(codec,
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false);
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false);
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if (rc)
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if (rc)
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@ -2979,13 +3014,18 @@ static int wcd_cpe_lab_ch_setup(void *core_handle,
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/* Continue with disabling even if toggle lab fails */
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/* Continue with disabling even if toggle lab fails */
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rc = core->cpe_cdc_cb->cdc_ext_clk(codec, false, false);
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rc = core->cpe_cdc_cb->cdc_ext_clk(codec, false, false);
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if (rc) {
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if (rc)
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dev_err(core->dev,
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dev_err(core->dev,
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"%s: failed to disable cdc clk, err = %d\n",
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"%s: failed to disable cdc clk, err = %d\n",
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__func__, rc);
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__func__, rc);
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goto done;
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}
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/* Unmask non-fatal CPE interrupts */
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cpe_intr_bits = ~(core->irq_info.cpe_fatal_irqs & 0xFF);
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if (CPE_ERR_IRQ_CB(core))
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core->cpe_cdc_cb->cpe_err_irq_control(
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core->codec,
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CPE_ERR_IRQ_UNMASK,
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&cpe_intr_bits);
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break;
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break;
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default:
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default:
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