Commit graph

3 commits

Author SHA1 Message Date
Radha Mohan Chintakuntla
150abb345e arm64: Add boot time configuration of Intermediate Physical Address size
ARMv8 supports a range of physical address bit sizes. The PARange bits
from ID_AA64MMFR0_EL1 register are read during boot-time and the
intermediate physical address size bits are written in the translation
control registers (TCR_EL1 and VTCR_EL2).

There is no change in the VA bits and levels of translation.

Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Reviewed-by: Will Deacon <Will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 87366d8cf7b3f6dc34633938aa8766e5a390ce33
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:31 -07:00
Marc Zyngier
4491d23e1a arm64: KVM: initialize HYP mode following the kernel endianness
Force SCTLR_EL2.EE to 1 if the kernel is compiled as BE.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-commit: 18ea3dbc9e5c8a53a361b17c4a5676ea6f4bcb72
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Ian Maund <imaund@codeaurora.org>
2014-02-07 15:55:34 -08:00
Marc Zyngier
27cb0e8f2a arm64: KVM: hypervisor initialization code
Provide EL2 with page tables and stack, and set the vectors
to point to the full blown world-switch code.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Git-commit: 092bd143cbb481b4ce1d55247a2987eaaf61f967
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Ian Maund <imaund@codeaurora.org>
2014-02-07 13:49:32 -08:00