Do not use kfree for memory allocated with devm_kzalloc during
failures as device memory will get freed in device release.
Change-Id: I6c4d3f8ed55ab02e3e70a1fe65452a8817c8b64e
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
The list_for_each macro was not used correctly, where the intermediate
variable would be LIST_POISON, resulting in a untrusted pointer
dereference. Switch to using list_for_each_entry_safe to for safe
removal of a list entry.
Change-Id: I0e0fd5dd9f251b5093d6e9d6335387512ec59249
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Fix possible null pointer access, possible attempt to access
array out of bounds and indentation.
Change-Id: If32501d18f57e50aeb378ed8965bfc3e236a6b2c
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Consider recent history (residencies) of the cluster and core
low power modes while the cluster level low power mode to enter
is selected.
Change-Id: Ifdc847a71136f55aded8a758b92179bb9aebfdcb
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Consider recent history (residencies) of the low power modes per
core while the next low power mode to enter is selected. If most
of the history says the pattern of residencies is repeating with
minimal deviation then use the average of these for predicting
the next mode to enter.
If the pattern is not repeating then if more than 50 percent of
the samples out of history have exited a low power mode earlier
than the minumim residency of that mode, restrict it and also low
power modes deeper than that.
In any of the above case, trigger a hrtimer to wakeup cpu with
timeout as predicted+delta or max residency of the mode selected
if a deeper state can be selected after waking up incase if
prediction goes wrong.
Change-Id: I902a06939e19ac51dfd8c2db6b727b203ebfda14
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
The low power mode selection logic has problems while
selecting best mode both in cpu and cluster selection.
When latency requirement is not met, the level selection
loop breaks without selecting another possible shallow
power mode that meets both latency and residency
requirements. The residencies are initialized to ~0
(0xFFFFFFFF) when a particular mode is disabled in idle
context. This results in wrong selection of shallower
mode in suspend context instead of selecting best possible
deepest low power mode (assuming the mode is enabled in
suspend context but disabled in idle context). This can
have impact on power.
The change addresses this by selecting a possible
shallower power mode that can meet the latency criteria.
It also initializes the residencies to 0 when a mode is
not allowed in idle context. This results in selection
of deepest low power mode in suspend context and
saves power.
Change-Id: I90a3496026f92522544a0abd7ffeeeb88f1732f6
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
The driver looks through all the enabled modes and does energy
calculation runtime before it selects a low power mode to enter.
With residency values, the cpu/cluster can choose the low power
mode as soon as it comes across the low power mode which meets
residency constraint.
Change-Id: I593810a9cf95ead9031bb9b8608b1da78a7b066f
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
When cluster enters a low power mode, the mode entered is stored
in last_level. During LPM driver probe last_level is initialized
to default level, if a core in that cluster is online.
If all the cores in the cluster are hotplugged after initializing
the last_level and before the per cluster data structures are
initialized, cluster enters low power mode but does not update
last_level as the data structures are not available. In this case
when a core in this cluster is coming online and last_level indicates
default level, assumes cluster did not enter any low power mode,
the update of flags to reflect the cores as active for this cluster
does not happen. This makes driver to select system level low power
mode as if this cluster is in low power mode eventhough it is out
of low power mode.
To avoid this race, prevent cores hotplug during lpm probe.
Change-Id: I1d0c51c52e54ab30239b2fca11040f134315fe61
Signed-off-by: Anil Kumar Mamidala <amami@codeaurora.org>
This reverts 'commit 9890d1939491 ("driver: lpm-workarounds:
disable/enable L2 low power modes")' as power regression seen
with disabling L2 low power modes.
Change-Id: I2a4fea67a62065c64bfa7ec3af8a20a18480dd13
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
when device battery capacity is less than 2%, PLL turn on
through spm is not working and causing lpm workarounds to
get struck in infinite loop.
Register for power supply notifications and postpone the
L1/L2 dynamic clock gating enablement till battery reach
safe level.
Change-Id: I21acdc6b097937bc54a06b72434e0a0a61570b8a
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Add pending interrupt no and cluster sleep time into lpm debug phys.
Change-Id: If601c48d09529effd2a44c88c8a75d2e98a92afb
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Prevent attempts to enable dynamic_clock_gating more than once.
If it is enabled more than once performance cores are getting
hotplugged due to mitigation request made.
Change-Id: If91e6f6999a3b917b3ff04cf82e46471211fe478
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Currently msm-pm driver is printing the enabled clocks during
the system suspend. After introducing the PSCI framework msm-pm
driver is not being used and can not able to know the enabled
clocks during suspend. Call an API to print the clocks from lpm
driver instead msm-pm driver.
e.g:
echo 1 > /d/clk/debug_suspend
Change-Id: I42373c882ce0d94efc7941238bb7ea011138ed63
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Achyuth Sai Vadrav <avadra@codeaurora.org>
Add information on which cluster low power mode causing reset of that
cluster level. This data will be used to send out pm notifications.
Change-Id: I4eb4f3cacb590bbc1110770d422dfbfe67bb338a
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Number of devices for each cluster is not available in PSCI mode.
Add this information in the DT and have this information available
in order to support cluster pm notification in PSCI mode as well.
Change-Id: I3328a9fa68df07b6b605bec7a13810007cb3a525
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
On targets, where some hardware CPUs are non functional, the bootloader
might prevent that CPU from being brought out of reset and remove it from
list of supported CPUs. To account for these scenarios, the cpuidle driver
shouldn't throw a error when a CPU phandle doesn't map to a corresponding
logical CPU id.
CRs-fixed: 756327
Change-Id: Ie11c078fb54028fcc3ae973a9cf9fd6d685d295c
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
commit 3836785a1bdcd6706c68ad46bf53adc0b057b310 upstream.
If there is a PM QoS latency limit and all of the sufficiently shallow
C-states are disabled, the cpuidle menu governor returns 0 which on
some systems is CPUIDLE_DRIVER_STATE_START and shouldn't be returned
if that C-state has been disabled.
Fix the issue by modifying the menu governor to return (-1) in such
situations.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
[shilpab: Backport to 3.10.y
- adjust context
- add a check if 'next_state' is less than 0 in 'cpuidle_idle_call()',
this ensures that we exit 'cpuidle_idle_call()' if governor->select()
returns negative value]
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The lpm-levels will work with PSCI specification using the OS initiated
scheme. The lpm-levels driver would determine the last man standing and
vote into TZ accordingly.
Change-Id: I65ff03a3b68e3a197dba7653caea271298bf1475
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Add support to terminate all low power modes in PSCI. The lpm-levels will
work with version 1.0 of PSCI specification using the OS initiated scheme.
The lpm-levels driver would determine the last man standing and vote into
TZ accordingly.
Change-Id: I7cbe2ded36ab320334dcf3f971fd6d4a36a881bf
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Current name is detected as misspelled name in the automation.
Rename cpumask variable name to num_children_in_sync.
Change-Id: I104b65ae5a25b793a0e1df2154d73d254fcec6a3
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
For L3 level collapse, the secure level OS needs a flag to clear the
vote to keep L3 active. Send this flag along with L2 flag in the smc
call.
Change-Id: I79794465ff725fb0d37c3519a37a0f8cb04ed441
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Add low power mode configuration for l3 and cbf
Change-Id: I871172c0fd7f5a28575d4687bbba31bb88e76753
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Currently we are allowing cpu low power modes when rpm ack is
pending, but it is observed that allowing cpu low power modes
causing ack interrupt getting fired on another cpu with some delay.
Fix for this is to disallowing cpu low power modes when
rpm ack is pending.
As this issue is reported only suspend/resume currently,
fix it in only suspend/resume path by not allowing cpu low power
modes in suspend/resume.
Change-Id: I31c1998c7ae48e2094bb98f017f66068319c76b9
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
There may be a case(ex;- thermal or bcl) where perf cores are already
hotplugged before dynamic clock gating not even enabled. In this case
dynamic clock gating work queue will not run and leads to thermal
mitigation always on. To fix this check perf cores online status during
dynamic clk gating enable from sysfs and schedule the
work queue right away.
Change-Id: I02552bf3996bb449a7656fce44bc45416014d135
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
cpuidle enter and exit ftrace events can mismatch if lpm driver falls
back after choosing a low power mode. Modify ftrace events to clearly
distinguish between cpu power select event and cpuidle enter event.
Change-Id: I81bc2b175264c6bdeec555b2b1271c0f40870b1b
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
smp_processor_id() should be called in non-preemptible context, so
use get_cpu() instead to ensure preempt is disabled during getting
current cpu and setting L1_L2_GCC register.
Change-Id: I749d42e2b77b2c0fe3188b2f468ed8d29909ee23
Signed-off-by: Xiaocheng Li <lix@codeaurora.org>
Fix Non boot cpu index property missing message to print
only for failure cases.
Change-Id: I30e295118d32b180ed0c572fadb144da8daaba8c
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Update cpu online mask for calculating cluster sleep time from
online cpus to select cluster level low power modes.
Change-Id: Ic595bf3f44f9bff2e0d6a56c60a592461457aa1c
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Core and L2 should be in quiescent state while enabling L1/L2 dynamic
clock gating. Implement a SW workaround to enable clock gating for boot
core and L2 which will get called when perf L2 is in power collapse.
Change-Id: I0f77a0e63b46cafdb94b2aeee70eff33b4b479a6
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
BUG_ON in get_cluster_sleep_time may lead to false alarm when
cluster_unprepare races with cluster_select. The below is the race.
If any core is about to select cci low power mode, it is
possible that another core from same cluster can wakeup and clears
the first cpu mask as well in cci cluster which will lead to crash.
But this is false alarm, since it still has channce to auto correct
the state machine in cluster_configure.
Change-Id: I730e916098dfcfde2c58eab088c84675b2b12172
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
1)Processing all cpu hotplug events leading to lpm_wa workqueue
getting scheduled multiple times and obseving the below warning message.
[22.136470] process_lpm_workarounds: perf L2 is not in low power mode
[22.138296] process_lpm_workarounds: perf L2 is not in low power mode
Fix this by ignorning all hotplug events except CPU_POST_DEAD and
CPU_ONLINE.
2) L1_l2_gcc register is secure on few chipsets, issue scm_io_write
to enable this.
3) Remove the lpmcx turbo vote WA.
Change-Id: I02a1a5af086fbb7f5782f51bff9f8b731e352125
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
L1/L2 dynamic clock gating feature gates the L1/L2 clock
automatically which saves dynamic power. Core and L2 should be
quiescent state while enabling L1/L2 clock gating, hence early boot
code can't enable this for perf core0 and L2.
Implement a WA which will get called when perf cluster is in
low power mode to enable L1/L2 clock gating for perf core0 and L2.
Change-Id: Ia268d90a306770a4089370f83e3c9101c2661f1c
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
last_resicency is already counted in msm lpm driver and local irq
is already enabled when exiting from lpm mode. It's not accurate
to count last_resicency here since it might include the time for
interrupts handling. So remove this repetitive code to avoid such
risk.
Change-Id: I0de9cb62c62b0393393d697740a691d29a13121b
Signed-off-by: Xiaocheng Li <lix@codeaurora.org>
Free the allocated memory for level_name to avoid the
memory leak in regsiter_cpu_lpm_stats().
Change-Id: I24f0feff2e05963986eaaf54610a8a5ed079b692
Signed-off-by: Mohammed Khajapasha <mkhaja@codeaurora.org>
The start addresses for different L2 low power modes could
be different between HLOSes. So HLOS cannot rely on secure
world to correctly program the L2 SPM.
Program L2 spm start address in HLOS and allow secure world
to configure only spm enable bit.
Change-Id: I3ae5d7a1574808a7fc33ab7d62294592fdc1fdf8
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Due to a hardware bug on 8939 and 8909, secure world needs
to disable and enable L2 SPM to get the proper context in
secure watchdog bite cases. With this workaround there is
a race in programming L2 SPM between HLOS and secure world.
This leads to stability issues. To avoid this program L2 SPM
only in secure world based on the L2 mode flag passed.
Change-Id: I426289e1fc66664ed9c4ecf81c4106ce2c7c1145
Signed-off-by: Anil Kumar Mamidala <amami@codeaurora.org>
Drivers like alarm can use this API to provide the wakeup time
from suspend, vMPM driver sends this time to RPM to be programmed
in MPM to wake up APSS from deep sleep.
Change-Id: I77d5ecad1735cd1daa47491ea6290b854e422812
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
LPM driver routes rpm-smd and mpm interrupts dynamically to the core
that is going to wake up next. For some targets for power reasons
it is recommended to affine these interrupts always to specific cores.
Add option to disable dynamic routing of these interrupts inside LPM
driver.
Change-Id: Ice2059a61f5dd9daf734ff74c86babe3fe133ec0
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
Maulik Shah
syphyr
LuK1337
Mahesh Sivasubramanian
Luca Stefani
Srinivas Rao L
Raju P.L.S.S.S.N
Archana Sathyakumar
Anil Kumar Mamidala
Anji Jonnala
Linux Build Service Account
Murali Nalajala
Rafael J. Wysocki
Xiaocheng Li
Mohammed Khajapasha
Venkat Devarasetty