Commit Graph

9 Commits

Author SHA1 Message Date
Tomasz Figa 7ccbc60cd9 pinctrl: exynos: Handle suspend/resume of GPIO EINT registers
Some GPIO EINT control registers needs to be preserved across
suspend/resume cycle. This patch extends the driver to take care of
this.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:09 +02:00
Tomasz Figa 499147c9db pinctrl: samsung: Split pin bank description into two structures
This patch splits pin bank description into two structures, one
describing bank type (currently only bitfield widths), which can be
shared across multiple banks and second containing bank-specific
parameters including a pointer to a bank type struct.

It is a prerequisite for further patch removing the statically hardcoded
register offsets, making it impossible to support SoCs with different
set and order of pin control registers.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:41:09 +02:00
Tomasz Figa a04b07c0fc pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
This patch reworks wake-up interrupt handling in pinctrl-exynos driver,
so each pin bank, which provides wake-up interrupts, has its own IRQ
domain.

Information about whether given pin bank provides wake-up interrupts,
how many and whether they are separate or muxed are parsed from device
tree.

It gives following advantages:
  - interrupts can be specified in device tree in a more readable way,
    e.g. :
    	device {
		/* ... */
		interrupt-parent = <&gpx2>;
		interrupts = <4 0>;
		/* ... */
	};
  - the amount and layout of interrupts is not hardcoded in the code
    anymore, but defined in SoC-specific structure
  - bank and pin of each wake-up interrupt can be easily identified, to
    allow operations, such as setting the pin to EINT function, from
    irq_set_type() callback

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 595be7268a pinctrl: exynos: Use one IRQ domain per pin bank
Instead of registering one IRQ domain for all pin banks of a pin
controller, this patch implements registration of per-bank domains.

At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts
of Exynos4x12) it simplifies driver code and device tree sources,
because GPIO interrupts can be now specified per banks.

Example:
	device {
		/* ... */
		interrupt-parent = <&gpa1>;
		interrupts = <3 0>;
		/* ... */
	};

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 1b6056d6db pinctrl: samsung: Include bank-specific eint offset in bank struct
Some SoCs, like Exynos4x12, have non-sequential layout of EINT control
registers and so current way of calculating register addresses does not
work correctly for them.

This patch adds eint_offset field to samsung_pin_bank struct and
modifies the driver to use it instead of calculating the offsets from
bank index.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 3a232ba86f pinctrl: samsung: Remove static pin enumerations
Since pin numbers are now assigned dynamically, those are not needed
anymore.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:11 +02:00
Tomasz Figa 40ba6227ae pinctrl: samsung: Assing pin numbers dynamically
This patch modifies the pinctrl-samsung driver to assign numbers to pins
dynamically instead of static enumerations.

Thanks to this change the amount of code requried to support a SoC can
be greatly reduced and the code made more readable.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:11 +02:00
Tomasz Figa ee2f573c42 pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa
Pins used as GPIO interrupts need to be configured as EINTs. This patch
adds the required configuration code to exynos_gpio_irq_set_type,
to set the pin as EINT when its interrupt trigger is configured.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:33:48 +09:00
Thomas Abraham 43b169db18 pinctrl: add exynos4210 specific extensions for samsung pinctrl driver
Add information about the Exynos4210 pin banks and driver data which is
used by the Samsung pinctrl driver. In addition to this, the support for
external gpio and wakeup interrupt support is included and hooked up with
the Samsung pinctrl driver.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07 06:07:19 +09:00