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438291 commits

Author SHA1 Message Date
Linux Build Service Account
717b917da0 Merge "ARM: dts: msm: Update GIC interrupts MPM mapping for MSM8976/56" 2015-08-13 11:32:19 -07:00
Linux Build Service Account
a9981cf374 Merge "soc: qcom: mpm_of: Print snapshot of enabled interrupts" 2015-08-13 11:32:18 -07:00
Linux Build Service Account
85319b798e Merge "ARM: dts: msm: Update BCL config to support partial goods for MSM8956" 2015-08-13 11:32:12 -07:00
Linux Build Service Account
01e22f7d54 Merge "msm: thermal: Add support for partial goods CPU" 2015-08-13 11:32:11 -07:00
Linux Build Service Account
7da95635e8 Merge "qcom: msm-pm: Partial goods support for sleep status driver" 2015-08-13 11:32:10 -07:00
Linux Build Service Account
a8a6fb1ed0 Merge "msm: spm_devices: Do not use predetermined logical ids for CPUs" 2015-08-13 11:32:08 -07:00
Linux Build Service Account
b3ead7684a Merge "regulator: qpnp-labibb-regulator: Program LAB_PRECHARGE_CTL unconditionally" 2015-08-13 11:32:06 -07:00
Linux Build Service Account
d901a22cad Merge "ARM: dts: msm: specify LAB/IBB required configuration for 8976 targets" 2015-08-13 11:32:06 -07:00
Linux Build Service Account
e5b5275338 Merge "regulator: qpnp-labibb-regulator: Fix IBB power up delay configuration" 2015-08-13 11:32:05 -07:00
Linux Build Service Account
9ccfee23ac Merge "ARM: dts: msm: add VI sense support via senary port in msm8976" 2015-08-13 11:32:04 -07:00
Linux Build Service Account
2d7ca2c492 Merge "msm: vidc: add support to set low latency property to venus" 2015-08-13 11:32:01 -07:00
Linux Build Service Account
b2eac1c78a Merge "Revert "ARM: dts: msm: msm8952 memory map changes"" 2015-08-13 11:32:01 -07:00
Linux Build Service Account
9c83f9a74a Merge "ARM: dts: msm: update BW Limits for 8976" 2015-08-13 11:32:00 -07:00
Linux Build Service Account
5560c0cb3c Merge "msm: mdss: specify HFlip and VFlip per pipe BW limit" 2015-08-13 11:31:59 -07:00
Sandeep Panda
5f7ce8f22f msm: mdss: handle dsi2hdmi chip connect disconnect events properly
In case dsi2hdmi chip is used as external display, then framework
reboot and connect disconnect events need to be handled separately.
So, when framework indicates reboot event by writing into sysfs node,
then power down the chip and send disconnect event to all registered
clients.

Change-Id: I4bfb43f60aad1a7f364af3b77a61fc24ba213e9f
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
2015-08-13 07:42:42 -07:00
AnilKumar Chimata
c45852e12c qseecom: Get app_arch flag for keymaster
With the keymaster 1.0 support appsbl is loading the keymaster
during boot-up, because of this app_arch flag is not propagated
which results in send modified command failures. This patch adds
support to get the app_arch for keymaster app if KM is loaded by
appsbl.

Change-Id: Iff997db8c96591c9f5e3d6609cfcb424b922f34a
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
2015-08-13 06:54:57 -07:00
Mallikarjuna Reddy Amireddy
d0c7e29345 ARM: dts: msm: Update TZ apps region for msm8956/76
Change the TZ apps region as per the new memory map, which
update the base address and size in dt.

Change-Id: I472ceab4e2fe06a51938a0d7e82d37d1e7f4bd0d
Signed-off-by: Mallikarjuna Reddy Amireddy <mamire@codeaurora.org>
2015-08-13 06:43:34 -07:00
Sandeep Panda
67d21de70d msm: mdss: properly handle dsi phy regulator for dual dsi case
In dual dsi case, if we do DSI PHY sw reset for one DSI controller
then it will reset the DSI PHY regulator also. Since DSI PHY
regulator is shared among both the DSI controllers, it might cause
side effects on the other DSI controller if that is active. So only
reset DSI PHY lane and PHY HW as when one of the DSI controller is
still in active state. Also avoid reconfiguring DSI PHY regulator in
dual dsi case if the other DSI controller is active.

Change-Id: I5ad1251c89e8ad3f521c4e5c11607494e14143cf
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
2015-08-13 15:51:29 +05:30
Abhijeet Dharmapurikar
3a51deb29e regulator: cpr-regulator: Add support for Voltage Sensors
Voltage sensor regulators need to be notified when the corner of apc
rail changes. Voltage Sensor regulator needs to be disabled prior
to changing the apc corner and needs to be notified of the ceiling
and floor voltage before enabling it again.

Change-Id: I0156480f6bfaf10397578caded2c15a298f20f95
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
2015-08-13 14:32:16 +05:30
Anirudh Ghayal
913a612ab7 defconfig: msm_defconfig: Enable voltage sensor driver
The voltage sensor driver monitors the droops on the
APC rails. Enable it on 8976.

Change-Id: I58ff7f1cb5d6389e42e6a150d584180a6e14bd3c
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
2015-08-13 14:29:13 +05:30
Abhijeet Dharmapurikar
7e945053f5 soc: qcom: Add Voltage Sensor Driver
Voltage Sensors are h/w blocks that monitor the voltage at particular
sites within the MSM.

They consist of a voltage controlled oscillator and use phase quantization
(frequency to digital) converter to report voltage. They need a known
frequency input to generate a code for the voltage observed.

The primary usecase is to set a bit in the status register when the
voltage crosses programmed minimum or maximum thresholds. This bit is
read by crash dump tool for debugging and analysis.

Change-Id: Ibe6e07776e9694422e64859c24951b91ddcdee46
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
2015-08-13 14:21:55 +05:30
ChandanaKishori Chiluveru
81b98890da USB: phy: msm: Don't put femto PHY in SIDDQ during host bus suspend
Currently PHY is put into SIDDQ during host bus suspend. But
recommendation is not to put PHY in SIDDQ during host bus suspend and
allow SIDDQ during cable disconnect. Hence fix this issue by setting
ALLOW_BUS_SUSPEND_WITH_REWORK flag.

Change-Id: Ifc17d425f1a20df627d310780bbf46c9a26db15c
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: ChandanaKishori Chiluveru <cchilu@codeaurora.org>
2015-08-13 00:54:37 -07:00
Subbaraman Narayanamurthy
0722791156 power: qpnp-fg: fix error in calculating cc_to_soc coefficient
Currently, MAH_TO_SOC_CONV_REG is read and the data is converted
to half float before dividing it by the learned capacity.
However, it should not be converted like that and should be used
as an unsigned integer instead. Also, before dividing it by the
learned capacity, convert it to MICRO_UNIT so that the floating
point encoding of cc_to_soc coefficient will be proper. Fix it.

CRs-Fixed: 887349
Change-Id: Ibbeca6f2aff24fc68bc8bf931fa03850ca22c3a9
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2015-08-13 00:17:02 -07:00
Xiaozhe Shi
d46d9eb43a power: smb1351: fix parallel mode i2c errors from incorrect check
Currently the smb1351-charger driver checks for the presence of the
smb1351 chip in the smb1351_parallel_set_chg_present function regardless
of whether or not the primary charger is calling it to notify of
presence or removal. This is incorrect, as the check will always fail
upon removal if the VDDCAP pin on the primary charger falls fast enough
and puts the smb1351 parallel charger in suspend. This causes subsequent
parallel charging enablements to fail to run the setup routines, and
thus fail enabling parallel charger altogether.

Fix this by only checking for smb1351 chip presence upon the primary
charger notifying the driver of presence, and not upon removal.

CRs-Fixed: 877809
Change-Id: Iac226309286f9169963f5bea07648074415cb4d3
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
2015-08-13 00:11:18 -07:00
Arun KS
a7bd22ffd7 ARM: dts: msm: Add CCI monitor device for MSM8976
MSM CCI monitors are added in MSM8976 to monitor CCI traffic.
Add CCI monitor devices for MSM8976.

Change-Id: I6a8a7ac45f79bd68290af982cb55ee52b1fe8314
Signed-off-by: Arun KS <arunks@codeaurora.org>
Signed-off-by: Hanumath Prasad <hpprasad@codeaurora.org>
2015-08-13 12:40:19 +05:30
Xiaozhe Shi
d1e9da27ec power: smb1351: set correct usb mode polarity when in parallel mode
Currently, the smb1351 driver does not set the same USB100/USB500 mode
polarity when ran in parallel mode. This can cause current limits of
500/900mA to be switched with 100/150mA.

Fix this by setting the same bits the smb1351 does in its normal hw_init
routine.

CRs-Fixed: 877809
Change-Id: I44ae3086fd86e46b15a2c16368fcd5aade771319
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
2015-08-13 00:08:34 -07:00
Hanumath Prasad
556900590c PM / devfreq: msmcci-hwmon: Add support for handling shared irq
Some targets have a single irq line which is shared among all
the cci hwmon counters. Enhance the driver to support shared interrupt
handling.

Change-Id: I5fdaecfaa14fa47e8f393fe51c538e5000e6ad5b
Signed-off-by: Arun KS <arunks@codeaurora.org>
Signed-off-by: Hanumath Prasad <hpprasad@codeaurora.org>
2015-08-13 12:38:12 +05:30
Ashay Jaiswal
9a5790131b ARM: dts: msm: Add SMB1351 parallel-charger configuration on 8956/8976
Add the DT configuration for SMB1315 parallel charger. Set the
enable-pin polarity to active high.

Change-Id: I5a87f2eeaec7d2b6623a4abc2bfc6434fc5fd3d4
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
2015-08-13 00:07:25 -07:00
Sathish Ambley
0196c12d64 ARM: dts: msm: add remote debugger driver dt node for 8976
The remote debugger driver allows a debugger running on a host
PC to communicate with a remote stub running on peripheral
subsystems. Add device tree entry for this driver.

Change-Id: Ib59e57aa00b4c3042b3429860a4379019fee502b
Acked-by: Vivek Iyer <viyer@qti.qualcomm.com>
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
2015-08-12 23:55:36 -07:00
Sathish Ambley
33f898d638 ARM: dts: msm: add remote debugger driver dt node for 8956
The remote debugger driver allows a debugger running on a host
PC to communicate with a remote stub running on peripheral
subsystems. Add device tree entry for this driver.

Change-Id: Ic7d0c50880f5e0f27d3e34bfcf5c07467193995a
Acked-by: Vivek Iyer <viyer@qti.qualcomm.com>
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
2015-08-12 23:54:47 -07:00
Saravana Kannan
e3f781263e PM / devfreq: bimc-bwmon: Fix counter clearing
The counter needs to be cleared and acknowledged before clearing the IRQ
bits. Otherwise, the HW could set the IRQ bit again if the old counter
value was higher than the threshold. So, add a memory barrier after
clearing the counter.

Change-Id: I35f9f7905b05b8a185eb94d04d9c0a8ccfc2db51
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
2015-08-12 23:52:11 -07:00
Xiaojun Sang
d6227bd53e ASoC: msm: add support for vi feedback on 8976 platform
add tasha_vifeedback dai definition.
fixup msm_vi_feed_tx_ch config for tasha.
add dynamic configuration by codec name check.

Change-Id: Iffdbb35bbe7f6df3e4550792a9f84c9c5073479a
Signed-off-by: Xiaojun Sang <xsang@codeaurora.org>
2015-08-12 22:48:19 -07:00
Manu Gautam
09b109818e usb: type_c: Add support for type-c detection using Pericom chip
Type-C defines new USB cables, connectors and plugs to allow
connecting USB cables without worrying about orientation. This
also allows detecting type-c enabled host/chargers enabling phone
to draw up to 3A current for charging.

Change-Id: Icdf913dcfdbd5c3d74c8bb3c7584be61e01d0056
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
2015-08-12 22:26:06 -07:00
Sarangdhar Joshi
25e2db24e3 soc: qcom: jtagv8: register for hotplug and cpu_pm notifiers
msm_jtag_save_state() and msm_jtag_restore_state() are called
directly from msm-pm driver. However msm-pm driver is going to be
deprecated when we move to PSCI framework. Add support in jtagv8
driver to rely on hotplug and cpu_pm callbacks for save and
restore functionality of Debug and ETM registers.

This commit also modifies the hotcpu callback in ETM driver to
avoid any race condition with hotcpu callback from Jtagv8 driver
that has been introduced in this commit.

Change-Id: I1261fdcb548b7a21b37090426efdbd77ea038333
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Xiaogang Cui <xiaogang@codeaurora.org>
2015-08-12 21:50:10 -07:00
Laxminath Kasam
14383e3d7a ASoC: wcd9330: update non cacheable registers to fix SSR mute
Mute observed when playback and SSR done continuously.
Found registers that are non-cacheable are not listed
in volatile API. This is resulting in mute in RX path
sometimes after SSR usecases. Update non cacheable registers
table and volatile API accordingly.

Change-Id: Id8afb37656b39214525bedb1c14b453231aaf742
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2015-08-12 16:11:36 -07:00
Linux Build Service Account
bd2078f611 Merge "ASoC: wcd9330: Avoid caching of codec digital registers" 2015-08-12 11:45:47 -07:00
Linux Build Service Account
e6b422e80d Merge "ASoC: msm: qdsp6v2: Handle additional codec specific metadata" 2015-08-12 07:35:21 -07:00
Linux Build Service Account
f58f3f8baf Merge "ALSA: compress: Add support to send codec specific data" 2015-08-12 07:35:20 -07:00
Banajit Goswami
c3be7c799b soundwire: turn soundwire device off if device is down
When Soundwire master device down callback is called, rather
than calling device suspend, call device down and turn off
clock.

Change-Id: I0c9b2b5cd3b816a6bb840309c588e02cf5ebb7c8
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
2015-08-12 05:10:42 -07:00
Banajit Goswami
36887d0685 ASoC: wcd9335: send SSR notification to soundwire
When ADSP Sub-system Restart (SSR) is triggered, it
is necessary to send corresponding device down
notification to Soundwire master driver. Without this,
once device comes back from SSR, audio playback on
speaker will not work. This change sends device down
notification from wcd9335 codec to soundwire master
during SSR.

Change-Id: Iae4776bb397303b736f0d35d5ab3aef4dd25178f
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
2015-08-12 05:06:48 -07:00
Srinivas Rao L
d11015ff54 ARM: dts: msm: Update GIC interrupts MPM mapping for MSM8976/56
Some interrupts can be bypassed during xo shutdown as they are not
responsible for wakeup. Update MPM mappings with such interrupts
for MSM8956 and MSM8976.

Change-Id: Ia62d235571f02ee24bc7bfa69267c7c1a00329a3
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Signed-off-by: Achyuth Sai Vadrav <avadra@codeaurora.org>
2015-08-12 04:52:35 -07:00
Anji Jonnala
dfe590a932 soc: qcom: mpm_of: Print snapshot of enabled interrupts
There is a window where dumping the bypass list is not
printing actual snapshot of enabled interrupts. Hence
dump the interrupts in mpm_enter_sleep which gives the
interrupt snapshot just before going to rpm assisted pc.

Change-Id: I46f075f5c3a8650944e45bfbf302c00f9fbb52d6
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Signed-off-by: Achyuth Sai Vadrav <avadra@codeaurora.org>
2015-08-12 04:50:38 -07:00
Hanumath Prasad
0c16de62bd PM / devfreq: bimc-bwmon: Update irq handling in suspend/resume
Change the sequence of registering and freeing the interrupt
handler in suspend/resume. Freeirq needs a guarantee that the
IRQ can't come anymore before we call it. So, we disable the IRQ
before calling freeirq.And register the handler before enabling
the irq to avoid the interrupt getting unhandled.

Change-Id: I3945202d049e16f64a16e456f914f7602b763c89
Signed-off-by: Hanumath Prasad <hpprasad@codeaurora.org>
2015-08-12 17:19:33 +05:30
Srinivas Rao L
7343f1c0dc msm: pm: Remove jtag save/restore from msm-pm
msm-pm driver calls msm_jtag_save_state() and msm_jtag_restore_state().
However msm-pm driver is going to be deprecated when we move to PSCI
framework. So remove msm_jtag_save_state and msm_jtag_restore_state
from msm-pm, so that jtag driver handles this in common for both PSCI
and non-PSCi targets.

Change-Id: Ie9060b50aa1118b23e71dbc00ba9ca5bd363f48c
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
2015-08-12 04:40:39 -07:00
Simmi Pateriya
b53f5051f9 ASoC: msm8952-slimbus: add support for ADSP SSR with tasha codec
MSM8976 target with WCD9335 codec supports ADSP sub-system restart.
Add necessary support for ADSP SSR on to MSM8976 target.

Change-Id: I2837c677b7e23044ebe461d96d55a0bd609d7b99
Signed-off-by: Simmi Pateriya <simmip@codeaurora.org>
2015-08-12 15:27:50 +05:30
Manaf Meethalavalappu Pallikunhi
dbcd6ef760 ARM: dts: msm: Update BCL config to support partial goods for MSM8956
It is possible that some physical CPUs may not be brought online and
it can be decided at runtime. This behavior changes the physical CPU
to logical CPU numbering dynamic. Only two performance cores will be
enabled for MSM8956. Adding all perf core phandles for BCL mitigation
will ensure that the mitigation is applied on the two enabled
perf cores.

Change-Id: Ie8b1f739548fd55561cd9850501a01c148d5f1b8
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
2015-08-11 22:42:46 -07:00
Ravindranath Thiyagarajan
f343400c2b regulator: qpnp-labibb-regulator: Program LAB_PRECHARGE_CTL unconditionally
Currently, LAB_PRECHARGE_CTL register is programmed if LAB is not
ready to be enabled by IBB. LAB_PRECHARGE_CTL needs to be configured
by the LAB/IBB driver irrespective of its previous setting.

CRs-Fixed: 877370
Change-Id: Idb473ba0b063f010e89b669b79f79349ebfd0d59
Signed-off-by: Ravindranath Thiyagarajan <rthiyaga@codeaurora.org>
2015-08-11 22:02:10 -07:00
Ravindranath Thiyagarajan
2013c04c33 ARM: dts: msm: specify LAB/IBB required configuration for 8976 targets
Specify the following configurations, IBB discharge resistance
needed for LCD mode, LAB max precharge time and IBB power-up/power-down
delay on all MSM8976 targets.

CRs-Fixed: 877370
Change-Id: I1092a47e92bbc7f3a70212b93b1d0d22dbd34664
Signed-off-by: Ravindranath Thiyagarajan <rthiyaga@codeaurora.org>
2015-08-11 22:02:06 -07:00
Ravindranath Thiyagarajan
076e52ccf4 regulator: qpnp-labibb-regulator: Fix IBB power up delay configuration
Currently, power up delay for IBB is programmed in the incorrect
register locations [4:3] of IBB_PWRUP_PWRDN_CTL_1. Fix this by
changing it to the correct register locations [5:4] of
IBB_PWRUP_PWRDN_CTL_1.

CRs-Fixed: 880446
Change-Id: I3beaf8cef749f3f1b0c77834b93f871de982e219
Signed-off-by: Ravindranath Thiyagarajan <rthiyaga@codeaurora.org>
2015-08-11 22:02:00 -07:00
Meng Wang
c940cf448a ARM: dts: msm: add VI sense support via senary port in msm8976
Add mi2s dai entry for senary port in 8976 dtsi.
Also add required VI sense pinctrl changes to support
VI sense via senary port on 8976.

Change-Id: I89a052306545acb4539e2e7ebfb34fbb0b1e99dc
Signed-off-by: Meng Wang <mwang@codeaurora.org>
2015-08-11 19:52:51 -07:00