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153 Commits

Author SHA1 Message Date
Mauro Carvalho Chehab 0b2b7b7ec0 i7core_edac: Add more status functions to EDAC driver 
This patch were co-authored with Aristeu Rozanski.

Signed-off-by: Aristeu Sergio <arozansk@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
 2010-05-10 11:44:45 -03:00
Mauro Carvalho Chehab 194a40feab i7core_edac: Add error insertion code for Nehalem 
Implements set_inject_error() with the low-level code needed to inject
memory errors at Nehalem, and adds some sysfs nodes to allow error injection

The next patch will add an API for error injection.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
 2010-05-10 11:44:45 -03:00
Mauro Carvalho Chehab a0c36a1f0f i7core_edac: Add an EDAC memory controller driver for Nehalem chipsets 
This driver is meant to support i7 core/i7core extreme desktop
processors and Xeon 35xx/55xx series with integrated memory controller.
It is likely that it can be expanded in the future to work with other
processor series based at the same Memory Controller design.

For now, it has just a few MCH status reads.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
 2010-05-10 11:44:45 -03:00