1d4e73697e
Change in PIL sequence to assert then MSS memory clamps before doing MSS restart. CRs-Fixed: 949533 Change-Id: Ibad2b957f90a1acacc648a91f8d75289a2d4821d Signed-off-by: Puja Gupta <pujag@codeaurora.org> Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org> |
||
---|---|---|
.. | ||
pil-femto-modem.txt | ||
pil-q6v5-mss.txt | ||
subsys-pil-tz.txt |