216 lines
7.6 KiB
C
216 lines
7.6 KiB
C
/* Copyright (c) 2010-2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __KGSL_PWRCTRL_H
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#define __KGSL_PWRCTRL_H
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/*****************************************************************************
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** power flags
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*****************************************************************************/
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#define KGSL_PWRFLAGS_ON 1
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#define KGSL_PWRFLAGS_OFF 0
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#define KGSL_PWRLEVEL_TURBO 0
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#define KGSL_PWRLEVEL_NOMINAL 1
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#define KGSL_PWRLEVEL_LAST_OFFSET 2
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#define KGSL_PWR_ON 0xFFFF
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#define KGSL_MAX_CLKS 11
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#define KGSL_MAX_REGULATORS 2
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#define KGSL_MAX_REGULATOR_NAME_LEN 8
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/* Only two supported levels, min & max */
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#define KGSL_CONSTRAINT_PWR_MAXLEVELS 2
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#define KGSL_RBBMTIMER_CLK_FREQ 19200000
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/* Symbolic table for the constraint type */
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#define KGSL_CONSTRAINT_TYPES \
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{ KGSL_CONSTRAINT_NONE, "None" }, \
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{ KGSL_CONSTRAINT_PWRLEVEL, "Pwrlevel" }
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/* Symbolic table for the constraint sub type */
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#define KGSL_CONSTRAINT_PWRLEVEL_SUBTYPES \
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{ KGSL_CONSTRAINT_PWR_MIN, "Min" }, \
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{ KGSL_CONSTRAINT_PWR_MAX, "Max" }
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#define KGSL_PWR_ADD_LIMIT 0
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#define KGSL_PWR_DEL_LIMIT 1
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#define KGSL_PWR_SET_LIMIT 2
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/*
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* States for thermal cycling. _DISABLE means that no cycling has been
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* requested. _ENABLE means that cycling has been requested, but GPU
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* DCVS is currently recommending running at a lower frequency than the
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* cycle frequency. _ACTIVE means that the frequency is actively being
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* cycled.
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*/
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#define CYCLE_DISABLE 0
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#define CYCLE_ENABLE 1
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#define CYCLE_ACTIVE 2
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struct platform_device;
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struct kgsl_clk_stats {
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unsigned int busy;
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unsigned int total;
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unsigned int busy_old;
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unsigned int total_old;
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};
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struct kgsl_pwr_constraint {
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unsigned int type;
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unsigned int sub_type;
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union {
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struct {
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unsigned int level;
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} pwrlevel;
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} hint;
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unsigned long expires;
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uint32_t owner_id;
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};
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/**
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* struct kgsl_pwrctrl - Power control settings for a KGSL device
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* @interrupt_num - The interrupt number for the device
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* @grp_clks - Array of clocks structures that we control
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* @power_flags - Control flags for power
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* @pwrlevels - List of supported power levels
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* @active_pwrlevel - The currently active power level
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* @previous_pwrlevel - The power level before transition
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* @thermal_pwrlevel - maximum powerlevel constraint from thermal
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* @default_pwrlevel - device wake up power level
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* @init_pwrlevel - device inital power level
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* @max_pwrlevel - maximum allowable powerlevel per the user
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* @min_pwrlevel - minimum allowable powerlevel per the user
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* @num_pwrlevels - number of available power levels
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* @interval_timeout - timeout in jiffies to be idle before a power event
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* @strtstp_sleepwake - true if the device supports low latency GPU start/stop
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* @gpu_reg - array of pointers to the regulator structures
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* @gpu_reg_name - array of pointers to the regulator names
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* @pcl - bus scale identifier
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* @ocmem - ocmem bus scale identifier
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* @irq_name - resource name for the IRQ
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* @clk_stats - structure of clock statistics
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* @l2pc_cpus_mask - mask to avoid L2PC on masked CPUs
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* @l2pc_cpus_qos - qos structure to avoid L2PC on CPUs
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* @pm_qos_req_dma - the power management quality of service structure
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* @pm_qos_active_latency - allowed CPU latency in microseconds when active
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* @pm_qos_wakeup_latency - allowed CPU latency in microseconds during wakeup
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* @bus_control - true if the bus calculation is independent
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* @bus_mod - modifier from the current power level for the bus vote
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* @bus_percent_ab - current percent of total possible bus usage
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* @bus_width - target specific bus width in number of bytes
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* @bus_ab_mbytes - AB vote in Mbytes for current bus usage
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* @bus_index - default bus index into the bus_ib table
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* @bus_ib - the set of unique ib requests needed for the bus calculation
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* @constraint - currently active power constraint
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* @superfast - Boolean flag to indicate that the GPU start should be run in the
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* higher priority thread
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* @thermal_cycle_ws - Work struct for scheduling thermal cycling
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* @thermal_timer - Timer for thermal cycling
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* @thermal_timeout - Cycling timeout for switching between frequencies
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* @thermal_cycle - Is thermal cycling enabled
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* @thermal_highlow - flag for swithcing between high and low frequency
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* @limits - list head for limits
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* @limits_lock - spin lock to protect limits list
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* @sysfs_pwr_limit - pointer to the sysfs limits node
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*/
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struct kgsl_pwrctrl {
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int interrupt_num;
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struct clk *grp_clks[KGSL_MAX_CLKS];
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unsigned long power_flags;
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unsigned long ctrl_flags;
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struct kgsl_pwrlevel pwrlevels[KGSL_MAX_PWRLEVELS];
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unsigned int active_pwrlevel;
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unsigned int previous_pwrlevel;
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unsigned int thermal_pwrlevel;
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unsigned int default_pwrlevel;
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unsigned int init_pwrlevel;
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unsigned int wakeup_maxpwrlevel;
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unsigned int max_pwrlevel;
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unsigned int min_pwrlevel;
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unsigned int num_pwrlevels;
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unsigned long interval_timeout;
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bool strtstp_sleepwake;
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struct regulator *gpu_reg[KGSL_MAX_REGULATORS];
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char gpu_reg_name[KGSL_MAX_REGULATORS][KGSL_MAX_REGULATOR_NAME_LEN];
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uint32_t pcl;
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uint32_t ocmem_pcl;
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const char *irq_name;
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struct kgsl_clk_stats clk_stats;
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unsigned int l2pc_cpus_mask;
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struct pm_qos_request l2pc_cpus_qos;
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struct pm_qos_request pm_qos_req_dma;
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unsigned int pm_qos_active_latency;
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unsigned int pm_qos_wakeup_latency;
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bool bus_control;
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int bus_mod;
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unsigned int bus_percent_ab;
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unsigned int bus_width;
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unsigned long bus_ab_mbytes;
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struct device *devbw;
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unsigned int bus_index[KGSL_MAX_PWRLEVELS];
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uint64_t *bus_ib;
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struct kgsl_pwr_constraint constraint;
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bool superfast;
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struct work_struct thermal_cycle_ws;
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struct timer_list thermal_timer;
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uint32_t thermal_timeout;
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uint32_t thermal_cycle;
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uint32_t thermal_highlow;
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struct list_head limits;
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spinlock_t limits_lock;
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struct kgsl_pwr_limit *sysfs_pwr_limit;
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};
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int kgsl_pwrctrl_init(struct kgsl_device *device);
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void kgsl_pwrctrl_close(struct kgsl_device *device);
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void kgsl_timer(unsigned long data);
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void kgsl_idle_check(struct work_struct *work);
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void kgsl_pre_hwaccess(struct kgsl_device *device);
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void kgsl_pwrctrl_pwrlevel_change(struct kgsl_device *device,
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unsigned int level);
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void kgsl_pwrctrl_buslevel_update(struct kgsl_device *device,
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bool on);
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int kgsl_pwrctrl_init_sysfs(struct kgsl_device *device);
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void kgsl_pwrctrl_uninit_sysfs(struct kgsl_device *device);
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int kgsl_pwrctrl_change_state(struct kgsl_device *device, int state);
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static inline unsigned long kgsl_get_clkrate(struct clk *clk)
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{
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return (clk != NULL) ? clk_get_rate(clk) : 0;
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}
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/*
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* kgsl_pwrctrl_active_freq - get currently configured frequency
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* @pwr: kgsl_pwrctrl structure for the device
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*
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* Returns the currently configured frequency for the device.
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*/
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static inline unsigned long
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kgsl_pwrctrl_active_freq(struct kgsl_pwrctrl *pwr)
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{
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return pwr->pwrlevels[pwr->active_pwrlevel].gpu_freq;
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}
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int __must_check kgsl_active_count_get(struct kgsl_device *device);
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void kgsl_active_count_put(struct kgsl_device *device);
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int kgsl_active_count_wait(struct kgsl_device *device, int count);
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void kgsl_pwrctrl_busy_time(struct kgsl_device *device, u64 time, u64 busy);
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void kgsl_pwrctrl_set_constraint(struct kgsl_device *device,
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struct kgsl_pwr_constraint *pwrc, uint32_t id);
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void kgsl_pwrctrl_update_l2pc(struct kgsl_device *device);
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#endif /* __KGSL_PWRCTRL_H */
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