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This patch contains useful bits of information about the sunxi clocks that may help and/or be interesting for current and future developers. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
56 lines
1.6 KiB
Text
56 lines
1.6 KiB
Text
Frequently asked questions about the sunxi clock system
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This document contains useful bits of information that people tend to ask
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about the sunxi clock system, as well as accompanying ASCII art when adequate.
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Q: Why is the main 24MHz oscillator gatable? Wouldn't that break the
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system?
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A: The 24MHz oscillator allows gating to save power. Indeed, if gated
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carelessly the system would stop functioning, but with the right
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steps, one can gate it and keep the system running. Consider this
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simplified suspend example:
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While the system is operational, you would see something like
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24MHz 32kHz
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PLL1
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\
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\_ CPU Mux
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[CPU]
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When you are about to suspend, you switch the CPU Mux to the 32kHz
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oscillator:
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24Mhz 32kHz
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PLL1 |
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/
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CPU Mux _/
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[CPU]
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Finally you can gate the main oscillator
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32kHz
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/
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CPU Mux _/
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[CPU]
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Q: Were can I learn more about the sunxi clocks?
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A: The linux-sunxi wiki contains a page documenting the clock registers,
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you can find it at
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http://linux-sunxi.org/A10/CCM
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The authoritative source for information at this time is the ccmu driver
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released by Allwinner, you can find it at
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https://github.com/linux-sunxi/linux-sunxi/tree/sunxi-3.0/arch/arm/mach-sun4i/clock/ccmu
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