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562e7370a4
The PPC405 hard core is used in both the Virtex-II Pro and Virtex 4 FX FPGAs. This patch cleans up the Virtex naming convention to reflect more than just the Virtex-II Pro. Rename files virtex-ii_pro.[ch] to virtex.[ch] Rename config value VIRTEX_II_PRO to XILINX_VIRTEX Signed-off-by: Grant C. Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
47 lines
1.3 KiB
C
47 lines
1.3 KiB
C
/*
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* arch/ppc/platforms/4xx/xilinx_ml300.h
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*
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* Include file that defines the Xilinx ML300 evaluation board
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*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is licensed
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* "as is" without any warranty of any kind, whether express or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_XILINX_ML300_H__
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#define __ASM_XILINX_ML300_H__
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/* ML300 has a Xilinx Virtex-II Pro processor */
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#include <platforms/4xx/virtex.h>
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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typedef struct board_info {
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unsigned int bi_memsize; /* DRAM installed, in bytes */
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unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
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unsigned int bi_intfreq; /* Processor speed, in Hz */
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unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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} bd_t;
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/* Some 4xx parts use a different timebase frequency from the internal clock.
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*/
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#define bi_tbfreq bi_intfreq
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#endif /* !__ASSEMBLY__ */
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/* We don't need anything mapped. Size of zero will accomplish that. */
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#define PPC4xx_ONB_IO_PADDR 0u
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#define PPC4xx_ONB_IO_VADDR 0u
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#define PPC4xx_ONB_IO_SIZE 0u
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#define PPC4xx_MACHINE_NAME "Xilinx ML300"
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#endif /* __ASM_XILINX_ML300_H__ */
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#endif /* __KERNEL__ */
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