mirror of
https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-09-22 04:15:02 +00:00
d04a0f79f5
The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot, correspondingly, the PGD also has to be 64-bits, so fix that up. The kernel and user permission bits really are decoupled in early cuts of the silicon, which means that we also have to set corresponding kernel permissions on user pages or we end up with user pages that the kernel simply can't touch (!). Finally, with those things corrected, really enable MMUCR.ME and correct the PTEA value (this simply needs to be the upper 32-bits of the PTE, with the size and protection bit encoding). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
162 lines
4.6 KiB
C
162 lines
4.6 KiB
C
#ifndef __ASM_SH_PAGE_H
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#define __ASM_SH_PAGE_H
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/*
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* Copyright (C) 1999 Niibe Yutaka
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*/
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/*
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[ P0/U0 (virtual) ] 0x00000000 <------ User space
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[ P1 (fixed) cached ] 0x80000000 <------ Kernel space
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[ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access
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[ P3 (virtual) cached] 0xC0000000 <------ vmalloced area
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[ P4 control ] 0xE0000000
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*/
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#ifdef __KERNEL__
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/* PAGE_SHIFT determines the page size */
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#if defined(CONFIG_PAGE_SIZE_4KB)
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# define PAGE_SHIFT 12
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#elif defined(CONFIG_PAGE_SIZE_8KB)
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# define PAGE_SHIFT 13
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#elif defined(CONFIG_PAGE_SIZE_64KB)
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# define PAGE_SHIFT 16
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#else
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# error "Bogus kernel page size?"
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#endif
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#ifdef __ASSEMBLY__
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#define PAGE_SIZE (1 << PAGE_SHIFT)
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#else
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#define PAGE_SIZE (1UL << PAGE_SHIFT)
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#endif
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#define PAGE_MASK (~(PAGE_SIZE-1))
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#define PTE_MASK PAGE_MASK
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#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
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#define HPAGE_SHIFT 16
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
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#define HPAGE_SHIFT 18
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
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#define HPAGE_SHIFT 20
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
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#define HPAGE_SHIFT 22
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
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#define HPAGE_SHIFT 26
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#endif
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#ifdef CONFIG_HUGETLB_PAGE
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#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE-1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
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#endif
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#ifndef __ASSEMBLY__
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extern void (*clear_page)(void *to);
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extern void (*copy_page)(void *to, void *from);
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extern unsigned long shm_align_mask;
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extern unsigned long max_low_pfn, min_low_pfn;
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extern unsigned long memory_start, memory_end;
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#ifdef CONFIG_MMU
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extern void clear_page_slow(void *to);
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extern void copy_page_slow(void *to, void *from);
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#else
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extern void clear_page_nommu(void *to);
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extern void copy_page_nommu(void *to, void *from);
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#endif
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#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \
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(defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB))
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struct page;
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extern void clear_user_page(void *to, unsigned long address, struct page *pg);
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extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg);
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extern void __clear_user_page(void *to, void *orig_to);
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extern void __copy_user_page(void *to, void *from, void *orig_to);
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#else
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#define clear_user_page(page, vaddr, pg) clear_page(page)
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#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
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#endif
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/*
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* These are used to make use of C type-checking..
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*/
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#ifdef CONFIG_X2TLB
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typedef struct { unsigned long pte_low, pte_high; } pte_t;
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typedef struct { unsigned long long pgprot; } pgprot_t;
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typedef struct { unsigned long long pgd; } pgd_t;
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#define pte_val(x) \
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((x).pte_low | ((unsigned long long)(x).pte_high << 32))
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#define __pte(x) \
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({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
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#else
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typedef struct { unsigned long pte_low; } pte_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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typedef struct { unsigned long pgd; } pgd_t;
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#define pte_val(x) ((x).pte_low)
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#define __pte(x) ((pte_t) { (x) } )
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#endif
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pgd(x) ((pgd_t) { (x) } )
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#define __pgprot(x) ((pgprot_t) { (x) } )
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#endif /* !__ASSEMBLY__ */
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/* to align the pointer to the (next) page boundary */
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#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
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/*
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* IF YOU CHANGE THIS, PLEASE ALSO CHANGE
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*
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* arch/sh/kernel/vmlinux.lds.S
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*
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* which has the same constant encoded..
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*/
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#define __MEMORY_START CONFIG_MEMORY_START
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#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
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#define PAGE_OFFSET CONFIG_PAGE_OFFSET
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#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
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#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT))
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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/* PFN start number, because of __MEMORY_START */
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#define PFN_START (__MEMORY_START >> PAGE_SHIFT)
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#define ARCH_PFN_OFFSET (PFN_START)
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#ifdef CONFIG_FLATMEM
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#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn)
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#endif
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#include <asm-generic/memory_model.h>
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#include <asm-generic/page.h>
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/* vDSO support */
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#ifdef CONFIG_VSYSCALL
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#define __HAVE_ARCH_GATE_AREA
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#endif
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/*
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* Slub defaults to 8-byte alignment, we're only interested in 4.
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* Slab defaults to BYTES_PER_WORD, which ends up being the same anyways.
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*/
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#define ARCH_KMALLOC_MINALIGN 4
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#define ARCH_SLAB_MINALIGN 4
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH_PAGE_H */
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