mirror of
https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-10-01 09:16:06 +00:00
30037f66ce
The code that prints the cache size assumes that L3 always lives in chipset and is shared across CPUs. Which is not really true. I think all the cachesizes reported by cpuid are in the processor itself. The attached patch changes the code to reflect that. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org> |
||
|---|---|---|
| .. | ||
| cpufreq | ||
| mcheck | ||
| mtrr | ||
| amd.c | ||
| centaur.c | ||
| changelog | ||
| common.c | ||
| cpu.h | ||
| cyrix.c | ||
| intel.c | ||
| intel_cacheinfo.c | ||
| Makefile | ||
| nexgen.c | ||
| proc.c | ||
| rise.c | ||
| transmeta.c | ||
| umc.c | ||