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This is a combination of 13 commits. commit 59a27ca89fb515caeac2b97059832515566f70d9 Author: John Howe <jhowe@codeaurora.org> Date: Tue Jan 4 17:18:54 2011 -0500 hw_random: Add Qualcomm MSM random number driver This driver uses the hardware random number generator on MSM chips. Change-Id: I13b4d831fb9b5487356af466536a9005107ff723 Signed-off-by: John Howe <jhowe@codeaurora.org> commit 09cae33a80706e0aa77bdc4e1b493ef2a36dbbde Author: John Howe <jhowe@codeaurora.org> Date: Fri Jan 14 10:21:05 2011 -0500 hw_random: add PRNG clock control Change-Id: I6d9dd2ee7c50020fb8d41242b655e172e4c9eff2 Signed-off-by: John Howe <jhowe@codeaurora.org> commit 0573eda3ce19c01825ded4fe850362c37460dc20 Author: John Howe <jhowe@codeaurora.org> Date: Mon Jan 24 14:56:06 2011 -0500 hw_random: remove clk frequency control The clock only supports one rate, 64MHz, and is set to that rate by default. Change-Id: I820c74e44f4ebdec7b891a4c89d681cb5c3dcee6 Signed-off-by: John Howe <jhowe@codeaurora.org> commit fab0a4d40e18be4a31a4720acafb128893c620e8 Author: John Howe <jhowe@codeaurora.org> Date: Tue Apr 12 14:48:51 2011 -0400 hw_random: Use memory barriers Change-Id: Ie216141d7f6997266d8c5ed4bbd436f1be6551b8 Signed-off-by: John Howe <jhowe@codeaurora.org> commit f07f1ba547790155db4c508ccfa58b64c967fe8e Author: Raj Kushwaha <rajk@codeaurora.org> Date: Tue Jul 26 14:35:28 2011 -0700 hw_random: msm: Remove PRNG hardware configuration LSFR and CONFIG registers are configured by secure domain code and XPU protected. CRs-Fixed: 284133 Signed-off-by: Mona Hossain <mhossain@codeaurora.org> (cherry picked from commit a4f802b0f5d0faee9e83020c599b2f4b0b27de5f) Change-Id: Ie73cc3a95d1e2fff970e4d71f15fc1cbb4ead11c Signed-off-by: Raj Kushwaha <rajk@codeaurora.org> commit 26cef0c9d572e55df0f17dc4a5de380595eddaeb Author: Matt Wagantall <mattw@codeaurora.org> Date: Thu Aug 11 17:19:31 2011 -0700 msm: clock: Use device names to distinguish between PRNG clocks Drivers should now use their device names to distinguish between clocks of the same type rather than the clock name. This allows the clock names to be updated to match the new naming convention. Change-Id: Ibf00fd3d406adb04299e3e79e379d4fefe70f2b4 Signed-off-by: Matt Wagantall <mattw@codeaurora.org> commit 5ad373931744ae98289ec680334d7cc0bee1c0b6 Author: Ramesh Masavarapu <rameshm@codeaurora.org> Date: Mon Oct 10 10:44:10 2011 -0700 msm: Add PRNG to MSM9615 device. Add configuration parameters for MSM9615 device. PRNG hardware registers initialization in msm_rng.c is done currently for MSM9615. Change-Id: I2a05e9e582ce94a25bec71e1acaee95d62cd9469 Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org> commit 2f963dbc78c6c0703f51466b2b242287a2df5487 Author: Ramesh Masavarapu <rameshm@codeaurora.org> Date: Thu Oct 20 15:33:50 2011 -0700 msm: Removed target specific changes for enabling PRNG h/w. The driver checks if the PRNG h/w is enabled. If it is not ON, it enables the PRNG h/w. Change-Id: I7c73eba7ba47f4fca116cfe0884758e6dd130ed0 Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org> commit 46af59fb8f4bce302ad4d787b63b25e46548df6a Author: Stepan Moskovchenko <stepanm@codeaurora.org> Date: Tue Feb 7 14:38:59 2012 -0800 msm: rng: Disable RNG init on APQ8064 Change-Id: Ic42a85c51faea8a17b02eb4987d0f5db732716c2 Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> commit a54263b0056b15cad1336a33d57bb1db013e8abb Author: Ramesh Masavarapu <rameshm@codeaurora.org> Date: Wed Feb 1 22:49:01 2012 -0800 msm: Removed XPU violations. During initialization, there is a violation in writing to "read only" registers for targets that support trust zone. Trustzone marks certain registers as read-only. This change fixes the issue by writing to registers only on targets that do not support trust zone. Change-Id: I69bb0f1bad199201aa3dd8b378ca1683dfa81c86 Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org> commit a99fcc24e94481134ca22f9778e88ed31646d6e3 Author: Ramesh Masavarapu <rameshm@codeaurora.org> Date: Wed Feb 22 14:30:32 2012 -0800 Revert "msm: rng: Disable RNG init on APQ8064" This reverts commit 46af59fb8f4bce302ad4d787b63b25e46548df6a. The RNG driver was initially disabled because of missing clock changes and this driver was causing boot up issues. Now with the clock changes checked in the RNG driver works. Change-Id: I127f25c8be6b715510c1fb16b274a814416d8a8a Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org> commit 801c392ab9ee2893c6f3ca506e43afa62798890b Author: Ramesh Masavarapu <rameshm@codeaurora.org> Date: Tue Apr 24 16:28:00 2012 -0700 prng: Replace clk_enable and clk_disable APIs. The clk driver has introduced new clock APIs that replace the existing clk_enable and clk_disable. -clk_enable() APIs is replaced with clk_prepare_enable(). -clk_disable() API is replaced with clk_disable_unprepare(). Change-Id: Ib6c452e7dc3f357497eae5a9302a7352a19fcb18 Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org> commit de991f08a8738dc66e65488aebed472de65ce237 Author: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org> Date: Thu May 31 13:15:51 2012 -0700 PRNG: Device tree entry for qrng device. Cleanup platorm device entry & add device tree entry Change-Id: I5bde944d63276a3aaf00b7415066963027f11249 Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org> commit a4100a4a6e2a1843645d3eff22dabb387d4cbb61 Author: Stephen Boyd <sboyd@codeaurora.org> Date: Mon Jun 25 15:48:37 2012 -0700 msm-rng: Fix PRNG_LFSR_CFG setup Changes to only configure the LFSR on devices that don't have the prng hardware already setup mistakenly removed the LFSR configuration. Instead, the change is ORing in 1s into the top 16 bits of the register (they're marked as reserved). Restore the original code by masking off the lower 16 bits of the register and filling them with values from the PRNG_LFSR_CFG_CLOCKS define. Change-Id: Idd0df7b49175c211eec5ea778733ae81f5bc8188 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> commit 0bef6ede4b779c19091234e20ecfbb76a44edac0 Author: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org> Date: Wed Nov 7 19:47:21 2012 -0800 msm: rng: Add support for iface clk Currently the driver supports only enabling core_clk,but on certain targets, iface_clk is used for the hardware RNG block. This fix adds compatibility to targets that have iface clock instead of the core clock. Change-Id: I480c3c7070e09f945439ea48e6877c7170ceeeb9 Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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.. | ||
Marvell | ||
msm | ||
nwfpe | ||
OMAP | ||
pxa | ||
SA1100 | ||
Samsung | ||
Samsung-S3C24XX | ||
SH-Mobile | ||
SPEAr | ||
sunxi | ||
VFP | ||
00-INDEX | ||
Booting | ||
cluster-pm-race-avoidance.txt | ||
firmware.txt | ||
Interrupts | ||
IXP4xx | ||
kernel_user_helpers.txt | ||
mem_alignment | ||
memory.txt | ||
Netwinder | ||
Porting | ||
README | ||
Setup | ||
swp_emulation | ||
tcm.txt | ||
vlocks.txt |
ARM Linux 2.6 ============= Please check <ftp://ftp.arm.linux.org.uk/pub/armlinux> for updates. Compilation of kernel --------------------- In order to compile ARM Linux, you will need a compiler capable of generating ARM ELF code with GNU extensions. GCC 3.3 is known to be a good compiler. Fortunately, you needn't guess. The kernel will report an error if your compiler is a recognized offender. To build ARM Linux natively, you shouldn't have to alter the ARCH = line in the top level Makefile. However, if you don't have the ARM Linux ELF tools installed as default, then you should change the CROSS_COMPILE line as detailed below. If you wish to cross-compile, then alter the following lines in the top level make file: ARCH = <whatever> with ARCH = arm and CROSS_COMPILE= to CROSS_COMPILE=<your-path-to-your-compiler-without-gcc> eg. CROSS_COMPILE=arm-linux- Do a 'make config', followed by 'make Image' to build the kernel (arch/arm/boot/Image). A compressed image can be built by doing a 'make zImage' instead of 'make Image'. Bug reports etc --------------- Please send patches to the patch system. For more information, see http://www.arm.linux.org.uk/developer/patches/info.php Always include some explanation as to what the patch does and why it is needed. Bug reports should be sent to linux-arm-kernel@lists.arm.linux.org.uk, or submitted through the web form at http://www.arm.linux.org.uk/developer/ When sending bug reports, please ensure that they contain all relevant information, eg. the kernel messages that were printed before/during the problem, what you were doing, etc. Include files ------------- Several new include directories have been created under include/asm-arm, which are there to reduce the clutter in the top-level directory. These directories, and their purpose is listed below: arch-* machine/platform specific header files hardware driver-internal ARM specific data structures/definitions mach descriptions of generic ARM to specific machine interfaces proc-* processor dependent header files (currently only two categories) Machine/Platform support ------------------------ The ARM tree contains support for a lot of different machine types. To continue supporting these differences, it has become necessary to split machine-specific parts by directory. For this, the machine category is used to select which directories and files get included (we will use $(MACHINE) to refer to the category) To this end, we now have arch/arm/mach-$(MACHINE) directories which are designed to house the non-driver files for a particular machine (eg, PCI, memory management, architecture definitions etc). For all future machines, there should be a corresponding arch/arm/mach-$(MACHINE)/include/mach directory. Modules ------- Although modularisation is supported (and required for the FP emulator), each module on an ARM2/ARM250/ARM3 machine when is loaded will take memory up to the next 32k boundary due to the size of the pages. Therefore, is modularisation on these machines really worth it? However, ARM6 and up machines allow modules to take multiples of 4k, and as such Acorn RiscPCs and other architectures using these processors can make good use of modularisation. ADFS Image files ---------------- You can access image files on your ADFS partitions by mounting the ADFS partition, and then using the loopback device driver. You must have losetup installed. Please note that the PCEmulator DOS partitions have a partition table at the start, and as such, you will have to give '-o offset' to losetup. Request to developers --------------------- When writing device drivers which include a separate assembler file, please include it in with the C file, and not the arch/arm/lib directory. This allows the driver to be compiled as a loadable module without requiring half the code to be compiled into the kernel image. In general, try to avoid using assembler unless it is really necessary. It makes drivers far less easy to port to other hardware. ST506 hard drives ----------------- The ST506 hard drive controllers seem to be working fine (if a little slowly). At the moment they will only work off the controllers on an A4x0's motherboard, but for it to work off a Podule just requires someone with a podule to add the addresses for the IRQ mask and the HDC base to the source. As of 31/3/96 it works with two drives (you should get the ADFS *configure harddrive set to 2). I've got an internal 20MB and a great big external 5.25" FH 64MB drive (who could ever want more :-) ). I've just got 240K/s off it (a dd with bs=128k); thats about half of what RiscOS gets; but it's a heck of a lot better than the 50K/s I was getting last week :-) Known bug: Drive data errors can cause a hang; including cases where the controller has fixed the error using ECC. (Possibly ONLY in that case...hmm). 1772 Floppy ----------- This also seems to work OK, but hasn't been stressed much lately. It hasn't got any code for disc change detection in there at the moment which could be a bit of a problem! Suggestions on the correct way to do this are welcome. CONFIG_MACH_ and CONFIG_ARCH_ ----------------------------- A change was made in 2003 to the macro names for new machines. Historically, CONFIG_ARCH_ was used for the bonafide architecture, e.g. SA1100, as well as implementations of the architecture, e.g. Assabet. It was decided to change the implementation macros to read CONFIG_MACH_ for clarity. Moreover, a retroactive fixup has not been made because it would complicate patching. Previous registrations may be found online. <http://www.arm.linux.org.uk/developer/machines/> Kernel entry (head.S) -------------------------- The initial entry into the kernel is via head.S, which uses machine independent code. The machine is selected by the value of 'r1' on entry, which must be kept unique. Due to the large number of machines which the ARM port of Linux provides for, we have a method to manage this which ensures that we don't end up duplicating large amounts of code. We group machine (or platform) support code into machine classes. A class typically based around one or more system on a chip devices, and acts as a natural container around the actual implementations. These classes are given directories - arch/arm/mach-<class> and arch/arm/mach-<class> - which contain the source files to/include/mach support the machine class. This directories also contain any machine specific supporting code. For example, the SA1100 class is based upon the SA1100 and SA1110 SoC devices, and contains the code to support the way the on-board and off- board devices are used, or the device is setup, and provides that machine specific "personality." This fine-grained machine specific selection is controlled by the machine type ID, which acts both as a run-time and a compile-time code selection method. You can register a new machine via the web site at: <http://www.arm.linux.org.uk/developer/machines/> --- Russell King (15/03/2004)