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34800598b2
These are all specific to some driver. They are typically the platform side of a change in the drivers directory, such as adding a new driver or extending the interface to the platform. In cases where there is no maintainer for the driver, or the maintainer prefers to have the platform changes in the same branch as the driver changes, the patches to the drivers are included as well. A much smaller set of driver updates that depend on other branches getting merged first will be sent later. The new export of tegra_chip_uid conflicts with other changes in fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED conflicts with the cleanup of the interrupt handling of that driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUAT24/Y2CrR//JCVInAQLUdw//V4pKPuKempSe1kuD2MJfqldHwEVOlAUt of1IhLPAp8tpCscPDQ0yTy3ixquINg4jVnaDLL+E0quVbhLu6hlS2TYNKDEaVAAc cPUtVEUdja7Cfu4+bXX2vcWM/UyI6Ax7bsUUcwu4wFnEsjA6qOSu/jYY4jXDguHq ODGQSaSz0XQkfVBsWOlO8W/ejb0T3y+Ro3M/Vz5qJsMnZBR8R/i9aUYDFGiZ1GTn 3APHB7ALz6SS5/9SJS65PH16poBexcea5gyb3gnR1yt30kRmMTOAWrLC+JdyqFaO 7LHXW514+D1QbWV2gwNCWhQSLbgp9PWq/FXJtq4StW7tgNbDbj1d1Dc1GX+fvk2M bBih1yWoIVx6CZWFBQ7gsbqVHUZ/sW2fo76yb8K5dVPXx0fL5lEkv5Xwk3gxbqt5 lPE8+z+jiL5D+8RK1DZQu1PfxzaMwDZkJkVoGLCcdyM7FvnX3LIYf2bqbcp+zrQL lz9aht9C1k12R7feOX8emlluNd3eaKv/6jLrOasUP5wrJDam5hesSD5mLeTlAdxZ U8XJe4L24dFv15/yrMCzcyes5EmB3aS3nfb9TsSfq22IOKo2PCQLCnL6Z/rfM+1p mGu7BqdBnx3/8NkHdUrttMWjuPNh77MfPM6RO/E+TaBLHtwvKoLWJAHAYQNmt2xH IbGcyorBD5s= =pQ3X -----END PGP SIGNATURE----- Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: driver specific updates" from Arnd Bergmann: "These are all specific to some driver. They are typically the platform side of a change in the drivers directory, such as adding a new driver or extending the interface to the platform. In cases where there is no maintainer for the driver, or the maintainer prefers to have the platform changes in the same branch as the driver changes, the patches to the drivers are included as well. A much smaller set of driver updates that depend on other branches getting merged first will be sent later. The new export of tegra_chip_uid conflicts with other changes in fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED conflicts with the cleanup of the interrupt handling of that driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up aforementioned trivial conflicts. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits) ARM: SAMSUNG: change the name from s3c-sdhci to exynos4-sdhci mmc: sdhci-s3c: add platform data for the second capability ARM: SAMSUNG: support the second capability for samsung-soc ARM: EXYNOS: add support DMA for EXYNOS4X12 SoC ARM: EXYNOS: Add apb_pclk clkdev entry for mdma1 ARM: EXYNOS: Enable MDMA driver regulator: Remove bq24022 regulator driver rtc: sa1100: add OF support pxa: magician/hx4700: Convert to gpio-regulator from bq24022 ARM: OMAP3+: SmartReflex: fix error handling ARM: OMAP3+: SmartReflex: fix the use of debugfs_create_* API ARM: OMAP3+: SmartReflex: micro-optimization for sanity check ARM: OMAP3+: SmartReflex: misc cleanups ARM: OMAP3+: SmartReflex: move late_initcall() closer to its argument ARM: OMAP3+: SmartReflex: add missing platform_set_drvdata() ARM: OMAP3+: hwmod: add SmartReflex IRQs ARM: OMAP3+: SmartReflex: clear ERRCONFIG_VPBOUNDINTST only on a need ARM: OMAP3+: SmartReflex: Fix status masking in ERRCONFIG register ARM: OMAP3+: SmartReflex: Add a shutdown hook ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP ... Conflicts: arch/arm/mach-tegra/Makefile arch/arm/mach-tegra/fuse.c drivers/rtc/rtc-sa1100.c
127 lines
3.2 KiB
C
127 lines
3.2 KiB
C
/*
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* arch/arm/mach-tegra/fuse.c
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*
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* Copyright (C) 2010 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/export.h>
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#include <mach/iomap.h>
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#include "fuse.h"
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#include "apbio.h"
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#define FUSE_UID_LOW 0x108
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#define FUSE_UID_HIGH 0x10c
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#define FUSE_SKU_INFO 0x110
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#define FUSE_SPARE_BIT 0x200
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int tegra_sku_id;
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int tegra_cpu_process_id;
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int tegra_core_process_id;
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enum tegra_revision tegra_revision;
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/* The BCT to use at boot is specified by board straps that can be read
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* through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs.
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*/
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int tegra_bct_strapping;
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#define STRAP_OPT 0x008
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#define GMI_AD0 (1 << 4)
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#define GMI_AD1 (1 << 5)
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#define RAM_ID_MASK (GMI_AD0 | GMI_AD1)
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#define RAM_CODE_SHIFT 4
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static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
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[TEGRA_REVISION_UNKNOWN] = "unknown",
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[TEGRA_REVISION_A01] = "A01",
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[TEGRA_REVISION_A02] = "A02",
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[TEGRA_REVISION_A03] = "A03",
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[TEGRA_REVISION_A03p] = "A03 prime",
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[TEGRA_REVISION_A04] = "A04",
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};
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static inline u32 tegra_fuse_readl(unsigned long offset)
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{
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return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
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}
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static inline bool get_spare_fuse(int bit)
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{
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return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4);
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}
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static enum tegra_revision tegra_get_revision(void)
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{
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void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804;
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u32 id = readl(chip_id);
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u32 minor_rev = (id >> 16) & 0xf;
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u32 chipid = (id >> 8) & 0xff;
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switch (minor_rev) {
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case 1:
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return TEGRA_REVISION_A01;
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case 2:
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return TEGRA_REVISION_A02;
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case 3:
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if (chipid == 0x20 && (get_spare_fuse(18) || get_spare_fuse(19)))
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return TEGRA_REVISION_A03p;
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else
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return TEGRA_REVISION_A03;
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case 4:
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return TEGRA_REVISION_A04;
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default:
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return TEGRA_REVISION_UNKNOWN;
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}
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}
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void tegra_init_fuse(void)
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{
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u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
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reg |= 1 << 28;
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writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
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reg = tegra_fuse_readl(FUSE_SKU_INFO);
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tegra_sku_id = reg & 0xFF;
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reg = tegra_fuse_readl(FUSE_SPARE_BIT);
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tegra_cpu_process_id = (reg >> 6) & 3;
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reg = tegra_fuse_readl(FUSE_SPARE_BIT);
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tegra_core_process_id = (reg >> 12) & 3;
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reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
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tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
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tegra_revision = tegra_get_revision();
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pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
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tegra_revision_name[tegra_get_revision()],
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tegra_sku_id, tegra_cpu_process_id,
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tegra_core_process_id);
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}
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unsigned long long tegra_chip_uid(void)
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{
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unsigned long long lo, hi;
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lo = tegra_fuse_readl(FUSE_UID_LOW);
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hi = tegra_fuse_readl(FUSE_UID_HIGH);
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return (hi << 32ull) | lo;
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}
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EXPORT_SYMBOL(tegra_chip_uid);
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