android_kernel_samsung_msm8976/arch/alpha/include/asm/pci.h
FUJITA Tomonori c186caca3d dma-mapping: alpha: use include/linux/pci-dma-compat.h
This converts Alpha to use include/linux/pci-dma-compat.h.  Alpha is the
only architecutre that implements the PCI DMA API in the own way.  That
makes it difficult to implement the generic DMA API via the PCI bus
specific DMA API.

The generic DMA API calls the PCI DMA API implementation in
arch/alpha/kernel/pci_iommu.c on non Jensen systems.  It calls the DMA API
in arch/alpha/kernel/pci-noop.c on Jensen systems.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Greg KH <greg@kroah.com>
Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-03-12 15:52:42 -08:00

143 lines
3.8 KiB
C

#ifndef __ALPHA_PCI_H
#define __ALPHA_PCI_H
#ifdef __KERNEL__
#include <linux/spinlock.h>
#include <linux/dma-mapping.h>
#include <asm/scatterlist.h>
#include <asm/machvec.h>
/*
* The following structure is used to manage multiple PCI busses.
*/
struct pci_dev;
struct pci_bus;
struct resource;
struct pci_iommu_arena;
struct page;
/* A controller. Used to manage multiple PCI busses. */
struct pci_controller {
struct pci_controller *next;
struct pci_bus *bus;
struct resource *io_space;
struct resource *mem_space;
/* The following are for reporting to userland. The invariant is
that if we report a BWX-capable dense memory, we do not report
a sparse memory at all, even if it exists. */
unsigned long sparse_mem_base;
unsigned long dense_mem_base;
unsigned long sparse_io_base;
unsigned long dense_io_base;
/* This one's for the kernel only. It's in KSEG somewhere. */
unsigned long config_space_base;
unsigned int index;
/* For compatibility with current (as of July 2003) pciutils
and XFree86. Eventually will be removed. */
unsigned int need_domain_info;
struct pci_iommu_arena *sg_pci;
struct pci_iommu_arena *sg_isa;
void *sysdata;
};
/* Override the logic in pci_scan_bus for skipping already-configured
bus numbers. */
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO alpha_mv.min_io_address
#define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
extern void pcibios_set_master(struct pci_dev *dev);
extern inline void pcibios_penalize_isa_irq(int irq, int active)
{
/* We don't do dynamic PCI IRQ allocation */
}
/* IOMMU controls. */
/* The PCI address space does not equal the physical memory address space.
The networking and block device layers use this boolean for bounce buffer
decisions. */
#define PCI_DMA_BUS_IS_PHYS 0
#ifdef CONFIG_PCI
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
enum pci_dma_burst_strategy *strat,
unsigned long *strategy_parameter)
{
unsigned long cacheline_size;
u8 byte;
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
if (byte == 0)
cacheline_size = 1024;
else
cacheline_size = (int) byte * 4;
*strat = PCI_DMA_BURST_BOUNDARY;
*strategy_parameter = cacheline_size;
}
#endif
/* TODO: integrate with include/asm-generic/pci.h ? */
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
return channel ? 15 : 14;
}
extern void pcibios_resource_to_bus(struct pci_dev *, struct pci_bus_region *,
struct resource *);
extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
struct pci_bus_region *region);
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
static inline int pci_proc_domain(struct pci_bus *bus)
{
struct pci_controller *hose = bus->sysdata;
return hose->need_domain_info;
}
#endif /* __KERNEL__ */
/* Values for the `which' argument to sys_pciconfig_iobase. */
#define IOBASE_HOSE 0
#define IOBASE_SPARSE_MEM 1
#define IOBASE_DENSE_MEM 2
#define IOBASE_SPARSE_IO 3
#define IOBASE_DENSE_IO 4
#define IOBASE_ROOT_BUS 5
#define IOBASE_FROM_HOSE 0x10000
extern struct pci_dev *isa_bridge;
extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
size_t count);
extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
size_t count);
extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
struct vm_area_struct *vma,
enum pci_mmap_state mmap_state);
extern void pci_adjust_legacy_attr(struct pci_bus *bus,
enum pci_mmap_state mmap_type);
#define HAVE_PCI_LEGACY 1
extern int pci_create_resource_files(struct pci_dev *dev);
extern void pci_remove_resource_files(struct pci_dev *dev);
#endif /* __ALPHA_PCI_H */