Mischa Jonker 5cd12e7776 ARC: Handle zero-overhead-loop in unaligned access handler ... commit c11eb222fd7d4db91196121dbf854178505d2751 upstream. If a load or store is the last instruction in a zero-overhead-loop, and it's misaligned, the loop would execute only once. This fixes that problem. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2013-10-18 07:45:45 -07:00
..
boot	ARC: [TB10x] Remove redundant abilis,simple-pinctrl mechanism	2013-05-15 10:12:03 +05:30
configs	ARC: Add support for nSIM OSCI System C model	2013-05-07 13:44:00 +05:30
include	ARC: Fix __udelay calculation	2013-10-18 07:45:45 -07:00
kernel	ARC: Handle zero-overhead-loop in unaligned access handler	2013-10-18 07:45:45 -07:00
lib	ARC: [lib] strchr breakage in Big-endian configuration	2013-08-29 09:47:34 -07:00
mm	ARC: lazy dcache flush broke gdb in non-aliasing configs	2013-05-25 14:15:55 +05:30
oprofile	ARC: OProfile support	2013-02-15 23:16:00 +05:30
plat-arcfpga	ARC port updates for Linux 3.10 (part 1)	2013-05-09 14:36:27 -07:00
plat-tb10x	ARC: [TB10x] Remove redundant abilis,simple-pinctrl mechanism	2013-05-15 10:12:03 +05:30
Kbuild
Kconfig	ARC: [mm] Aliasing VIPT dcache support 2/4	2013-05-09 21:59:46 +05:30
Kconfig.debug
Makefile	ARC: [TB10x] Add support for TB10x platform	2013-05-07 13:43:59 +05:30