android_kernel_samsung_msm8976/arch/arm/mach-highbank
Rob Herring 73053d973d ARM: highbank: fix cache flush ordering for cpu hotplug
The L1 data cache flush needs to be after highbank_set_cpu_jump call which
pollutes the cache with the l2x0_lock. This causes other cores to deadlock
waiting for the l2x0_lock. Moving the flush of the entire data cache after
highbank_set_cpu_jump fixes the problem. Use flush_cache_louis instead of
flush_cache_all are that is sufficient to flush only the L1 data cache.
flush_cache_louis did not exist when highbank_cpu_die was originally
written.

With PL310 errata 769419 enabled, a wmb is inserted into idle which takes
the l2x0_lock. This makes the problem much more easily hit and causes
reset to hang.

Reported-by: Paolo Pisati <p.pisati@gmail.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:37:46 -07:00
..
Kconfig cpufreq / highbank: add support for highbank cpufreq 2013-02-02 00:01:15 +01:00
Makefile ARM: highbank: use common debug_ll_io_init 2012-11-07 18:00:24 -06:00
core.h clk: highbank: Use common of_clk_init() function 2013-01-24 11:12:46 -08:00
highbank.c arm-soc: cleanups 2013-02-21 14:58:40 -08:00
hotplug.c ARM: highbank: fix cache flush ordering for cpu hotplug 2013-04-18 09:37:46 -07:00
platsmp.c irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h 2013-01-12 10:47:32 -06:00
pm.c ARM: highbank: save and restore L2 cache and GIC on suspend 2013-01-07 21:08:26 -08:00
smc.S ARM: highbank: Add smc calls to enable/disable the L2 2012-06-07 22:39:43 -07:00
sysregs.h ARM: highbank: mask cluster id from cpu_logical_map 2013-01-31 13:54:30 -06:00
system.c ARM: highbank: fix typos with hignbank in power request functions 2013-01-07 21:08:24 -08:00