171 lines
3.4 KiB
C
171 lines
3.4 KiB
C
/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MSM_VIDC_RESOURCES_H__
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#define __MSM_VIDC_RESOURCES_H__
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#include <linux/platform_device.h>
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#include <media/msm_vidc.h>
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#define MAX_BUFFER_TYPES 32
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#define IDLE_TIME_WINDOW_SIZE 30
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struct clock_voltage_table {
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u32 clock_freq;
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u32 voltage_idx;
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};
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struct clock_voltage_info {
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struct clock_voltage_table *cv_table;
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u32 count;
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};
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struct load_freq_table {
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u32 load;
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u32 freq;
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u32 supported_codecs;
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};
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struct reg_value_pair {
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u32 reg;
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u32 value;
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};
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struct reg_set {
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struct reg_value_pair *reg_tbl;
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int count;
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};
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struct addr_range {
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u32 start;
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u32 size;
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};
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struct addr_set {
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struct addr_range *addr_tbl;
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int count;
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};
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struct iommu_info {
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const char *name;
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u32 buffer_type[MAX_BUFFER_TYPES];
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struct iommu_group *group;
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int domain;
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bool is_secure;
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struct addr_range addr_range[MAX_BUFFER_TYPES];
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int npartitions;
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};
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struct iommu_set {
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struct iommu_info *iommu_maps;
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u32 count;
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};
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struct buffer_usage_table {
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u32 buffer_type;
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u32 tz_usage;
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};
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struct buffer_usage_set {
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struct buffer_usage_table *buffer_usage_tbl;
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u32 count;
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};
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struct regulator_info {
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struct regulator *regulator;
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bool has_hw_power_collapse;
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char *name;
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};
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struct regulator_set {
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struct regulator_info *regulator_tbl;
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u32 count;
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};
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struct clock_info {
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const char *name;
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struct clk *clk;
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struct load_freq_table *load_freq_tbl;
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u32 count; /* == has_scaling iff count != 0 */
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bool has_gating;
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};
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struct clock_set {
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struct clock_info *clock_tbl;
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u32 count;
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};
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enum msm_vidc_power_mode {
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VIDC_POWER_NORMAL = BIT(0),
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VIDC_POWER_LOW = BIT(1),
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VIDC_POWER_TURBO = BIT(2),
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VIDC_POWER_LOW_LATENCY = BIT(3),
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};
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struct bus_info {
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struct msm_bus_scale_pdata *pdata;
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u32 priv;
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u32 sessions_supported; /* bitmask */
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bool passive;
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enum msm_vidc_power_mode power_mode;
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};
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struct bus_set {
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struct bus_info *bus_tbl;
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u32 count;
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};
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struct msm_vidc_platform_resources {
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phys_addr_t firmware_base;
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phys_addr_t register_base;
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uint32_t register_size;
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uint32_t irq;
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struct load_freq_table *load_freq_tbl;
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uint32_t load_freq_tbl_size;
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struct reg_set reg_set;
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struct addr_set qdss_addr_set;
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struct iommu_set iommu_group_set;
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struct buffer_usage_set buffer_usage_set;
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uint32_t ocmem_size;
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uint32_t max_load;
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uint32_t dcvs_min_load;
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uint32_t dcvs_min_mbperframe;
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struct platform_device *pdev;
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struct regulator_set regulator_set;
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struct clock_set clock_set;
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struct clock_voltage_info cv_info;
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struct clock_voltage_info cv_info_vp9d;
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struct bus_set bus_set;
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uint32_t power_modes;
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bool dynamic_bw_update;
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bool use_non_secure_pil;
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bool sw_power_collapsible;
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bool sys_idle_indicator;
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bool early_fw_load;
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bool thermal_mitigable;
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const char *fw_name;
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uint32_t pm_qos_latency_us;
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};
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static inline int is_iommu_present(struct msm_vidc_platform_resources *res)
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{
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if (res)
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return (res->iommu_group_set.count > 0 &&
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res->iommu_group_set.iommu_maps != NULL);
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return 0;
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}
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extern uint32_t msm_vidc_pwr_collapse_delay;
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#endif
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